Architecture Design 

Power Aware Architecture Design for Multicore SoCs 

Discovering problems with system performance and power consumption late in the development cycle can be catastrophic to project schedules and product competitiveness, causing failure in the market. To predict the dynamic system performance and power of multi-function, multi-application SoC architectures, system-level simulation and analysis must be done earlier in the design cycle to accelerate innovation. This impacts both system OEMs and semiconductor companies, and creates an opportunity for information sharing and collaboration within the supply chain. The Synopsys solution for Multicore SoC Architecture Design includes the Platform Architect Tools, Architecture Design Models, and CoStart Enablement Services.

 

 
Synopsys Platform Architect provides architects and system designers with SystemC TLM tools and efficient methods for the, early analysis and optimization of multicore SoC architectures for performance and power.


 
Available SystemC TLM models of commonly required SoC architectural components including generic traffic generators, AMBA and OCP-IP based interconnect models, memory subsystem models and embedded processor models.


 
Synopsys CoStart is a packaged service that provides education, examples and consulting to accelerate adoption of architecture design methodologies so users become productive in the shortest time.

System-level performance and power analysis in Synopsys Platform Architect provides system designers with the transaction-level simulation, rapid turnaround time and powerful system-level visibility they need to greatly improve the analysis and decision making process, reduce project risk and achieve optimal system performance and power for multi-function, multi-application, multi-processor SoCs without overdesign.


Embedded Systems Architecture Trends Requiring Analysis and Results with
Platform Architect