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25 nm Omega FinFET: Three-dimensional Process and
Device Simulations Strained PMOS Transistor
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Full Documentation

This Sentaurus TCAD simulation project provides a template setup for threedimensional process simulation and device simulations of Omega FinFETs. The three-dimensional process simulation is based on a particularly robust approach in which geometry-altering and dopant-related processing steps are executed sequentially in two separate groups.

The Sentaurus Workbench template project also performs 3D quantum transport IdVgs simulations using the density gradient model. The influence of the complex dopant redistribution during the short annealing (RTA) on the electrical characteristics of the final FinFET is discussed. In addition, the influence of quantum effects on this nanoscale device is investigated.

Diagram
Drain-half of final device structure.

Diagram
As-implanted arsenic profile. Arrows indicate the direction of the implantation ion beams for the first (solid) and second (dashed) extension implant. For better viewing, only the (transparent) silicon layer as well as three arsenic isosurfaces are shown.

Diagram
Electron concentration at four cross sections of the fin for the bias point Vgs = Vds = 1 V. Slices are taken at the middle of the channel (0 nm), at the edges of the gate (±12 nm), and inside the extension area ((±25 nm).

Diagram
Drain current as function of gate voltage for a drain bias of 50 mV (blue) and 1 V (red). Solid lines are quantum transport (including the density gradient model) and dashed lines are classical transport.