Design for Manufacturing Product Family

Press Releases

Synopsys Optimizes Hercules Physical Verification Suite for IBM 65nm Design Kits
• Synopsys Proteus OPC Delivers Superior Cost of Ownership on Intel® Core™ Microarchitecture
• Synopsys Unveils New Breed of DFM Products to Solve Process-Related Variation Issues at 45NM and Beyond
• Synopsys Extends DFM Leadership with Launch of PrimeYield Tool Suite for Yield Analysis
• Synopsys PrimeYield LCC Links to IC Compiler for Automated Correction of Lithography Problems
• Synopsys’ PSM Technology Adopted by NEC Electronics for 65-nm Production and Beyond
• SEMATECH and Synopsys to Develop Advanced OPC Models for 45-Nanometer
• Synopsys i-Virtual Stepper System for Photomask Qualification Implemented by UMC
• Grace Semiconductor Manufacturing Standardizes on Synopsys' DFM Tool Suite

Article

• Model-Based Metal Fill Optimizes Planarization and Increases Yield
• Demystifying DFM
• Improving 90nm FPGA chips with an alternating phase-shift mask
• DFM in Action
• Spread of RET masks at 65nm node drives 'virtual stepper' software
• Solid State Technology: Analyzing strained-silicon options for stress-engineering transistors
• EE Times: Synopsys CEO calls for DFM cooperation