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Overview
VCS Native Testbench (NTB) provides built-in natively-compiled support for full-featured SystemVerilog and OpenVera® testbenches to deliver up to 5X faster verification performance:
- Next-generation Constraint Solvers
- Built-in Stream Generator
- Advanced Data Types
- Object-Oriented Programming (OOP)
- Classes
- Threads/Fork
- Mailbox/Semaphore
- Virtual Ports
- Default Arguments
- DirectC/DPI support
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- Associative Array
- Dynamic Array
- Shadow Variables
- DDR interfaces
- Functional Coverage
- SmartQ
- Pack/Unpack/CRC
- Assertion Interface
- Reference Verification Methodology (RVM)
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- Benefits
- Provides up to 5X faster verification performance compared with stand-alone testbench and simulation tools
- Increases testbench effectiveness by enabling the use of object-oriented techniques, constrained-random stimulus and functional coverage.
- Speeds verification environment development when coupled with Synopsys’ proven Reference Verification Methodology (RVM) and DesignWare® Verification IP.

VCS Native Testbench Speeds Real-World Verification
Native Testbench Verification Technology
Verification engineers have known for many years that they cannot possibly think of all possible design scenarios and manually write directed test cases to verify them. The solution has been to introduce randomness into stimulus generation, which both automates the process and exercises corner cases that might not be hit by hand-written directed tests.
However, purely random functions can only be used to generate random data unrelated to previous values, subsequent values or other random variables. Therefore, they cannot be used to generate significant stimulus values, such as the destination address in a network packet or the instruction op code in an instruction. These require constrained-random stimulus generation, which uses constraints to guide the generation of the values.
Constraints—and the solver required to find random solutions that satisfy them—allow the generation of correlated random variables. They allow the creation of coherent, high-level random stimulus—not just irrelevant payload data bytes. Declarative constraints, built on an object-oriented framework, can be efficiently described in any order, then easily added, removed or modified to obtain different data streams, focus on a corner case or inject errors, all without requiring any modification to the stimulus-generation code.

Constrained-Random Technology
Constrained-random capability requires the ability to specify constraints efficiently plus constraint-solver engines to generate high-quality stimulus within the bounds of these constraints. The VCS NTB technology supports all the constructs necessary to describe constraints in an efficient and natural manner.
The same production-proven constraint solver used in Synopsys’ Vera® testbench automation tool is included in VCS’ NTB technology, so that testbenches running entirely within VCS have the same capabilities. The constraint solver uses multiple engines and analyzes all constraints in parallel. This allows solutions to complex combinations of constraints across verification objects. Many other constraint solvers handle only one constraint at a time, serially, which severely limits their ability to find solutions to complex, interacting sets of constraints and often generates false constraint conflicts that are time-consuming to diagnose and work around.
The VCS NTB solver never reports false constraint contradictions; it is guaranteed to find a constraint solution if one exists and if it can be found in the time allocated. If actual constraint conflicts prevent a solution, VCS makes it easy to diagnose and fix the error by calculating and displaying the minimal conflicting subset of constraints.
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