Synopsys Solutions Close the Design to Manufacturing Gap
Synopsys’ comprehensive portfolio of products and services close the gap that currently exists between design and manufacturing by enabling companies to utilize data, information and analysis across Process Technology Development, Design and Manufacturing to improve yield. Synopsys’ Manufacturing Yield Management (MYM) solutions accelerate the process, by which customers identify, characterize and eliminate sources of failure throughout the entire product lifecycle.

The product development process consists of three broad steps: Process Technology Development, Product Design and Product Manufacturing.

Process Technology Development
Process Technology Development involves the creation and characterization of fundamental transistor devices that become the basic building blocks for an integrated circuit. During process technology development, tens of thousands of electrical and physical characteristics are measured and the margins or variance within the actual manufacturing operations are determined.

MYM's TestChip Solutions accelerate and improve Process Technology Development. A set of robust test structures, TechXpress™ Silicon IP test arrays or Traditional TestChip Libraries, measure the yield and parametric impact of each new process step. Synopsys test structures enable customers to characterize lithography capabilities, tune fabrication equipment and ultimately create and validate a new set of design rules. During process technology integration, the MYM solution helps achieve optimal device matching, and identify specific structures that could limit yield or reduce reliability. When the process technology is ready to be qualified, the MYM software can quantify the device, interconnect, yield and defect models so design groups can quickly incorporate the new process and accompanying design rules in full production.

Links to TCAD Solutions
MYM test structures also provide essential characterization data needed to calibrate TCAD models. This is crucial at the 130 to 90nm technology nodes which require analyses of hundreds of thousands of individual parameters. The MYM to TCAD link enables customers to simulate the impact of early and mid-production process technology changes on yield. The accuracy of "what-if" simulations - Process/Device and SPICE - improve by utilizing real process data obtained through in-line measurements from the available test structures or TechXpress arrays. Simulations measure a device's reaction to specific process technology changes and therefore enable trade-offs to be made between transistor performance/size and yield.

Product Design
Designing complex semiconductors requires sophisticated software such as Astro™ to place and connect individual transistors. The transistor and wire characteristics, the design's timing and area constraints and the technology specific design rules derived during the process technology development all drive the layout tools to produce a working design.

It is well documented that designs yield higher if their layout is not sensitive to manufacturing defects. The MYM solutions address this by linking into the design flow.

Links to Design Tools
YIELDProjector accumulates highly accurate test data from TechXpress to build a yield model for a specific manufacturing process. YIELDProjector then accurately analyzes a design, predicts its entitled yield and pinpoints defect sensitive areas in the layout before the design is committed to silicon. YIELDProjector output also drives sophisticated layout modification tools to make changes such as moving a polygon, or adding a redundant via or contact to an IC layout to obtain the best tradeoff between size, performance and yield.

Manufacturing
Semiconductor manufacturing involves hundreds of individual processing steps that use complex equipment to deposit patterned layers of various materials on a silicon wafer to create transistors and connect them to form electronic circuitry or functionality. After completion of each of these process steps, accurate measurements and inspections are required to find defects and eliminate their source. In the case of new process technology, interaction between the various wafer fabrication processes and the design layout frequently manifest themselves as new defect types. Oftentimes the sources of these defects are extremely difficult to find without very complex data analysis.

Synopsys’ Odyssey™ software provides semiconductor customers with a comprehensive and fully customizable data management and analysis environment. The Odyssey use model is very straightforward and seamlessly accepts data from all sources in the manufacturing process. An intuitive GUI enables users to quickly perform a significant amount of complex analysis. Odyssey's graphical output formats and reports are extremely helpful and descriptive in resolving and managing defects, performing yield analysis and characterization of product and processes.

Design - Manufacturing Link
TestChip Advantage, which is based on our Odyssey product, is a single unified data management and analysis solution that enables Process Technology Development teams to analyze large amounts of data from TechXpress and pass the results to process/device simulators and to design layout tools. Key test chip parameters and analysis templates are loaded into the TestChip Advantage software prior to running in the fab, so that analysis results are immediately available as soon as lots are processed. Process knowledge thus gained is retained by fab personnel – and not third-party consultants.

Product Development Flow

Synopsys Manufacturing Yield Optimization Solutions Drive TCAD and
Design to Improve Yield