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|  NXP CoolFlux DSP Star IP MacroCell The NXP CoolFlux™ DSP is an ultra-low-power, fully synthesizable DSP core targeted at low-power audio applications. To develop CoolFlux DSP technology, NXP drew on its many years' experience and research in digital audio and ultra-low power technologies from the company's Digital Systems Labs in Leuven, Belgium. The technology is easily programmable with development tools provided by NXP and developed by DSP Valley partner Target Compiler Technologies. CoolFlux DSP is a synthesizable 24-bit DSP Core for ultra-low power applications like portable audio encoding/decoding, sound enhancement, and noise suppression. The core targets specific applications such as headsets, hearing instruments, and portable audio players. A 135 MHz system clock is aimed at for 0.18-micron CMOS worst-case commercial conditions, with a supply voltage of 1.8V. This equates to >1000MOPS. Estimated performance in 0.13-micron CMOS is 175 MHz at 1.2V supply. As an example, with voltage scaling, 128kbps stereo MP3 decoding is possible on the core with power consumption less than 1 mW in 0.18-micron CMOS. A highly efficient optimizing C compiler is provided in the development tool kit next to an instruction level simulator, assembler, linker and graphical debugger. In collaboration with Synopsys, NXP now makes the CoolFlux DSP core available through the Synopsys DesignWare® Star IP program. Synopsys packages the IP in a Design Views coreKit, which includes the simulation and timing models, a verification environment and full documentation. The Design Views, which include the simulation and timing models, a verification environment and full documentation, are available to DesignWare Library customers for no additional charge. For an additional fee, DesignWare Library users may license from NXP the Implementation Views of the CoolFlux DSP core, including the RTL. After purchase, Synopsys will provide design and implementation support.
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