DesignWare® Memory Building Blocks - Embedded SRAM

DesignWare embedded SRAMs are technology-independent and can therefore be targeted to different vendor library processes without any HDL code changes. Target applications for DesignWare embedded SRAMs include register files, small scratch pad memory and look up tables.

The high performance memory components are built from cells within the ASIC library and should be kept small in order to obtain the most efficient area implementation. Hard Macros should be used for larger memory requirements.

The DesignWare Memory Building Block components and the entire DesignWare Memory Solutions are part of the DesignWare IP library and available at no additional cost.

• Download the DesignWare Building Block Components
• Product Documentation

Single Port (Flip Flop based)

• Asynchronous Single-Port RAM
• Synchronous Single-Port, Read/Write RAM

Single Port (Latch based)

• Asynchronous Single-Port RAM
• Single-Port, Read/Write RAM

Dual Port (Flip Flop based)

• Asynchronous Dual-Port RAM
• Synchronous Write-Port, Asynchronous Read-Port RAM

Dual Port (Latch based)

• Asynchronous Dual-Port RAM
• Write-Port, Asynchronous Read-Port RAM

Three Port (Flip Flop based)

• Asynchronous Three-Port RAM
• Synchronous Write-Port , Asynchronous Dual Read-Port RAM

Three Port (Latch based)

• Asynchronous Three-Port RAM
• Write-Port, Asynchronous Dual Read-Port RAM

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For pricing information or to order print literature on DesignWare products, please contact the DesignWare team.