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The DesignWare Memory Controllers are a set of configurable, fully synthesizable solutions for both dynamic, static and FIFO memories.
DesignWare Memory Controller MacroCell
Recent Enhancements:
- SDR/Mobile-SDRAM and Micron Mobile DDR SDRAM can now share the same memory bus
- Fully pipelined architecture for high speed applications
The DesignWare Memory Controller MacroCell is a fully configurable, synthesizable solution for both dynamic and static memories.
A single controller can support multiple memory types such as DDR-SDRAM, Mobile DDR-SDRAM, SDR-SDRAM, Mobile SDR-SDRAM, SRAM, SSRAM and NOR Flash devices.
The DW_memctl interfaces to the system via an AMBA AHB 2.0 compatible interface and could also be interfaced to other buses through a
simple gasket.
- DesignWare Memory Controller MacroCell
The DesignWare Memory Controller is licensed as part of the DesignWare library.
DesignWare Memory Building Blocks - FIFO Controllers
The DesignWare FIFO controller components are technology independent and therefore can be targeted to different vendor library processes without any HDL changes. The FIFO controllers provide address generation, write-enable logic, flag logic, and operational error detection logic. Some of the parameterizable features include FIFO depth, almost empty level, almost full level, level of error detection, and type of reset.
The DesignWare Memory Building Block components and the entire DesignWare Memory Solutions are part of the DesignWare Library and available at no additional cost.
- FIFO Controllers with Static Flags
- FIFO Controllers with Dynamic Flags
- Stack Controller
For pricing information or to order print literature on DesignWare products, please contact the
DesignWare team.
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