| Complete Tool Set for IP-Based Design and Verification |
Overview
When creating an SoC design with existing IP, it is critical to rapidly configure and verify the IP in the targeted environment early in the design cycle.
When designs are created using multiple IP blocks and an on-chip bus like AMBA, designers need to be able to easily connect and configure multiple IP blocks to the bus and focus on the new logic in the design.
With the DesignWare IP reuse tools, IP creators can package their IP in a format that will guide the IP integrator through the configuration, implementation, and verification of the IP.
IP integrators can then create and begin verification of complex IP blocks and subsystems in hours not days -- greatly reducing the overall cycle time.
Synopsys provides a complete set of IP tools for single IP blocks and IP-based subsystems, enabling IP creators and integrators to easily create and support complex IP.
- Products
- coreBuilder - efficiently packages the IP
- coreConsultant - guides the user through configuration and integration of a core
- coreAssembler - allows the user to create and manage packaged IP-based subsystems. This Includes assembly, configuration, and implementation.
 Datasheet
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