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DesignWare Verification IP for OCP 2.1 (Open Core Protocol) - Now at Production Release and Ready for Download
The DesignWare Verification IP for OCP 2.1 (Open Core Protocol) is now at production release and can be downloaded from the DesignWare IP directory. OCP is a common standard IP core interface, or socket, that facilitates "plug and play" system-on-chip (SoC) design. The DesignWare OCP verification IP provides 100 percent coverage of the functional coverage groups defined in section 4 of the OCP-IP document "OCP 2.0/2.1 Compliance Checks." The DesignWare Verification IP for OCP supports Verilog and VHDL testbenches in all popular simulators. It also supports the popular VMM methodology, as defined in the Verification Methodology Manual for SystemVerilog, enabling easy integration with constrained-random, coverage-driven environments. DesignWare VIP for OCP is available stand-alone and is also included in the DesignWare Library and VCS Verification Library. More information and the data sheet for OCP Verification IP can be found at the Synopsys IP directory:
http://synopsys.com/products/designware/docs/ds/v/ocp.html
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