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DesignWare System-Level Library – It's like hardware, only better!
The DesignWare® System-Level Library provides product development teams with high-performance SystemC transaction-level simulation
models (TLMs) for creating virtual platforms.
All DesignWare System-Level Library models are written in SystemC and work in any IEEE 1666 (SystemC) compliant simulation environments,
making them tool-independent.
The DesignWare System-Level Library features more than 50 TLMs, including models of DesignWare standards-based connectivity IP such as USB 2.0
HS OTG, SATA AHCI and AMBA interconnect components. Also included are high performance models of ARM processors. Additional DesignWare
Connectivity IP models will be available in upcoming releases throughout the year.
The availability of TLM's for DesignWare connectivity IP marks another milestone for the DesignWare portfolio, as it enables
DesignWare customers to create virtual platforms for all software development tasks in parallel to the actual hardware.
The ready-to-use TLM models in the System-Level Library are the basic building blocks required to build virtual platforms for early
hardware/software co-design, architectural exploration and system verification. Virtual platforms are fast, full-function software
models of the hardware that enable software development and software/hardware integration months before hardware is available.
Typical use cases for virtual platforms include driver development, firmware development, OS porting, and application software development.
Also, included in the DesignWare System-Level Library are pre-assembled models of complete platforms, such as the VPTEST platform,
which can be used as reference designs for driver development or as a starting point for building larger virtual platforms. The VPTEST
platform is a ready-to-be used testbench for bus peripherals, plus it comes with a complete software setup for hardware test routines. This
makes it an ideal entry to a software-driven verification process, using real software as part of the testbench.
For more information go to System-Level Library web page
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