|
Overview
The DesignWare® coolSRAM embedded memory IP solution consists of high performance and low power memory compilers including Single Port SRAM, Dual Port SRAM, Register File and ultra high density ROM. Based on Novelics. patented memory design techniques the compilers leverage the standard foundry delivered bitcells to ensure high yield and reliability. The DesignWare coolSRAM embedded memory IP is an ideal solution for any ASICs, ASSPs, System-on-Chip (SoC) and System-in-Package applications with stringent power, speed or area requirements.
The DesignWare coolSRAM instances are generated through a web based memory compiler, allowing designers to immediately create the exact memory instance required for their design, and match their precise requirements in terms of address depth, word width, aspect ratio, power and speed. The entire family of DesignWare coolSRAM IP has been fully silicon validated and the compilers have been extensively verified and characterized to help ensure the highest quality of deliverables.
Key Features
- High performance, operating at speeds over 1.2GHz on 65nm low power process with 32Kb cache
- Advanced power management features reduces dynamic power consumption by up to 50% compared to competitive SRAM-6T offerings
- Selectable power speed and aspect ratio
- Uses up to metal 4
- Advanced leakage control
- Supports power mesh and power ring
- Signal routable over instance
- Near zero setup time
- Operates at VDD+/- 10%
- Operates from -40c to 125c
- Silicon proven
- High yield
- Early defect detection
For questions or comments on DesignWare, Contact Us
|
