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University Programs

Presentations

  The Landscape of Parallel Computing Research: The Berkeley View
Professor Kurt Keutzer, EECS
University of California Berkeley
(Includes voice over)


It now appears to be a manifest destiny that multiprocessors will displace uniprocessors as the general-purpose computing platform for future desktop computers, laptop computers, and even cellular handsets. This talk will outline perspectives on a number of attendant trends that form "the Berkeley View."
Link to presentation

 
  Scaling the Power Wall
Dr. Jan Rabaey
Donald O. Pederson Distinguished Professor
University of California Berkeley
(Includes voice over)


Many approaches have been introduced to address the concerns regarding both active and standby power. Yet, none of these provides a persistent answer that extends into the foreseeable future. Going to the next step will require us to venture in some new directions, some of which may be quite unorthodox. In this presentation, we will browse some of the opportunities that may arise through ultra low-power design and outline some potential solutions.
Link to presentation

 
  Power Reduction: Is it Time to Re-examine Asynchronous Design?
Dr. Robert Damiano
Synopsys Fellow and Vice President, Advanced Technology Group
Synopsys
(Includes voice over)


This presentation will introduce some existing methodologies for designing ICs that are free of global clock distribution networks. These ICs have lower power and are less sensitive to variation compared to their conventional counterparts. Research opportunities for new tools in this area will also be addressed.
Link to presentation

 
  The Future is BDA
Dr. A. Richard Newton
Late Dean and Roy W. Carlson Professor of Engineering
University of California, Berkeley


More years ago now than I care to remember, I began my career in the microelectronics industry as we contributed to the relentless evolution of Gordon Moore's famous law of exponential growth in chip complexity. Our industry started with physics—the physics of materials called semiconductors. Physicists at Bell Laboratories in New Jersey struggled for years to understand the detailed physics of materials like germanium, gallium arsenide, and silicon. They studied surfaces, properties like resistance and thermal conductivity under various conditions, and many other physical properties of semiconductors, until in 1947 the physicists John Bardeen, William Shockley, and Walter Brattain were credited with inventing the semiconductor transistor.
Read full article

 
  Simplicity and Executability: Cornerstones of Quality
Mike Keating
Synopsys Fellow
Synopsys, Inc.
Presented at ISQED 2006


There are two great truths in design: If it's not tested, it's broken. And if it's not simple, it's broken. This talk focuses on aspects of both issues. Code is the natural form of communication between designer and compiler; yet most code is demonstrably not simple; hence it is broken. Drawings are the natural form of communication between engineers, and user documents are how we communicate to customers. Yet typically, these documents are not executable, and thus not tested; hence they are all broken. Similarly, state machines and inter-module interfaces are often many orders of magnitude more complex than needed; they are quantifiably not simple, hence broken. This talk explores the underlying causes of these problems, and proposes some solutions.
Link to presentation

 
  Microelectronics 2012-2020: Closing The Gap In The International Technology Roadmap For Semiconductors
Dr. A. Richard Newton
Late Dean and the Roy W. Carlson Professor of Engineering
University of California, Berkeley


This year marks the 40th anniversary of Moore's Law, the prescription that has motivated a generation of semiconductor innovation and economic growth in the industry. According to the International Technology Roadmap for Semiconductors (ITRS), its days are numbered! Somewhere between 2012 and 2015, many believe the semiconductor industry will run out of good ideas and technological innovation will slow, until sometime around 2020-2025 by when we hope to have come up with something entirely new and better — chips based on carbon nanotubes perhaps. In the mean time, we cannot simply give up — we must find innovative ways to 'close the gap' and keep our economic growth moving forward.

In this presentation, I present two major advanced research activities underway at Berkeley and at other major research centers that promise to close that gap: first, at the materials level, power dissipation for high-end systems and energy consumption for portable, mobile systems are bound to limit progress, while second, at the system level we must exploit vast amounts of concurrency to avoid the need for impossibly high clock frequencies (more power) and to mitigate the growing impact of signal delay in chips.

At the materials level, Berkeley researchers believe that the use of multi-element 'designer nanolayers', perhaps a few nanometers thick, atop a silicon substrate that acts simply as a mechanical support can be used to improve mobility by as much as an order of magnitude. Increased mobility will allow further reliable scaling of circuits. Coupled with the use of large number relatively conventional von Neumann microcomputers on every chip, these innovations should allow us to extend the continuous performance improvements needed in microelectronics systems that fuel economic growth until at least the end of the first quarter of this century.
Link to presentation