Online Seminars

Leakage Mitigation in ARM Processor-Based Systems

Available on Demand: Listen Now!

Original broadcast: December 18, 2007
Duration: 60 minutes

Leakage mitigation techniques such as power gating, state retention and dynamic threshold scaling have been shown to significantly reduce standby power consumption. A technical study of state retention schemes, power gating topologies and in-rush current management approaches will be presented in this Webinar, supported by data from a number of leakage optimized implementations and results from silicon technology demonstrators.

ARM and Synopsys jointly present a set of recommended best practices for leakage mitigation in ARM processor based SoCs, together with architectural partitioning, design methodologies and IP that enable the development of SoCs with both low power consumption and high performance. Research and findings discussed in this webinar are also included in the Low Power Methodology Manual (published by Springer), co-authored by ARM and Synopsys.

Presenters

Alan Gibbons, Principal Engineer at Synopsys, Inc.
Alan Gibbons is a Principal Engineer at Synopsys with a focus on advanced methodology for ARM based system design. His current focus is on the development of low power solutions for ARM platforms. He has been involved in IC engineering for over 20 years specializing in the design and development of processor based ICs for data and wireless communication applications. He holds a BSc in Physics, Applied Physics and Microelectronics from Nottingham University, UK.

John Biggs, Consultant Engineer at ARM Ltd.
John Biggs has been involved with ARM developments since 1986 and co-founded ARM Ltd. in 1990. After a number of years working as a VLSI design engineer he went on to form ARM's Design Methodology Group in 1995. He currently works as a Consultant Engineer in ARM's research group focusing on the development of advanced methodologies for the low-power deployment of synthesizable ARM IP.

Past Seminars

• Accelerate AMBA 3 AXI Design Verification with DesignWare
• Leverage Transaction-level Modeling for Your AMBA Interconnect-based Design
• Solving the Design and Verification Challenges of AMBA-based SoCs
• Synopsys Case Study: Achieving High Performance and Predictability in ARM Core Implementation
• ARM® - Synopsys® Reference Methodology Delivering the Flexibility of Soft IP with
  the Predictability of Hard IP