Synopsys User's Group (SNUG) Israel 2009
March 24, 2009
Location: Daniel Hotel
60 Ramot Yam
SNUG Israel 2009 will take place in the Daniel Hotel in Herzelia, Israel on March 24, 2009.
A full agenda of user presentations, R&D talks and tutorials, as well as user panels will be offered. Presentation topics will include low power methodology, RTL to GDS design flows and challenges, FPGA design and hardware assisted verification, design for test, static timing analysis for very deep submicron technologies, functional verification methodology, analog mixed signal simulations, design-for-manufacturing and more.
SNUG Israel is a highly interactive event built around users’ presentations, tutorials and panels. As well as the formal program, attendees will have time to mix with Synopsys executives and R&D staff on an informal basis to exchange ideas and discuss the latest technology. The presentations and discussions are focused on hot topics in chip design and verification.
SNUG Israel attendance grew steadily since 2000, with a 30% increase taking last year’s attendance up to 480 individuals from 90 different companies, reflecting the value that this forum brings to the design community.
The call for papers is now closed, but watch out for the invitation for attendees to register in the coming weeks.
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