Meet the CEO - Interview with Aart De Geus, Synopsys
Derek Boyd, CEO of the UK’s National Microelectronics Institute, spoke to Aart de Geus, Synopsys CEO and Chairman, about the state of the chip industry, technology trends and innovation. This interview first appeared on NMI’s web site: www.nmi.org.uk.
NMI’s recent design survey shows business confidence is strong right now in UK and Ireland; do you see this reflected elsewhere?
Yes. It is 4-5 years since the downturn of 2001 and it is very clear that there is a real resurgence of the high-tech semiconductor industry. Markets are truly global and mainly consumer dominated. Electronics integration is opening up more doors and driving the delivery of more and more applications (particularly in computing and communications) to an ever-increasing number of consumers. The market is now more mature and steady, providing great opportunities and great design challenges.
What are the particular strengths of the UK?
The UK has always had some interesting strengths, highlighted by the level of VC investment in start-ups and degrees of innovation. The UK is strong in software, which is especially relevant given the increasing number of embedded software applications and greater levels of integration.
The wireless market is particularly strong in the UK. Increased integration has enabled, for example, the combined mobile phone/MP3 player - the wireless and consumer markets now being synonymous.
The UK has a tradition of providing IP blocks for other players, particularly processor cores and blocks for wireless applications.
The embedded software field is now completely interlinked with chip design and, going forward, it is wide open to what extent the UK’s processor cores, wireless technology and software expertise can be leveraged.
Whilst on this topic, it is interesting to note Synopsys have recently acquired Virtio (see http://www.virtio.com/) to expand its presence in h/w and s/w co-development and modelling.
Which regions of the world are the hot markets for Synopsys right now?
Israel is making huge investment in start-ups; Growth in Eastern Europe is slow with Russia seemingly unsure how to translate their oil wealth into investment in technology.
China particularly stands out with 400 new design companies last year. There has been a slight decrease this year as stronger companies have taken over the weaker ones in a Darwinian-type process of survival of the fittest. China is strong on pushing through an engineering perspective - of the top 10 leaders of the country, every one is an engineer – they really think about technology! There is a strong process through the education system, incubation and in VC investment such that a graduate enters a company already very well trained. The problem lies in management expertise which takes 5-7 years to develop for every level of management; you can teach skills in schools, but not experience – this takes time.
India has seen a rapid growth of more established companies, mostly large multi-nationals, driven by the cost benefits and strength of available talent. However, there is still little entrepreneurship.
What are the main technical challenges ahead for the EDA industry and the user community and where can we expect to see innovation in EDA products?
Today, the bulk of design is systematic. The focus is on solving the constraints of area, timing, power, test and yield simultaneously. This is completely normal in the evolution of a high-tech industry, a classic example being how IT systems evolved from being command-line driven to using a GUI. Now the architecture of a system needs to cope with dramatic complexity and increased integrity – it is no longer enough to simply land a probe on Mars; the Mars Rover was required to drive around for 2 years, whilst gathering its data and analysing it!
Point innovation has moved to the fringes – moving down towards silicon with an emphasis on the physics and DfM (variation in yield can make or break a company) and upwards in complexity towards platforms and embedded software. The fundamental change in the last 5 years is that platform-based (or IP-block based) design is now a reality. IP blocks now exist for core elements such as advanced processor cores, DSP cores, memories etc. Productivity can be directly linked to the libraries and levels of abstraction used.
The desire for complexity is always moving up and the level of abstraction gets proportionately higher. There is a real need to trust what is happening below to behave in the way that is expected, whilst simultaneously taking into account the physical effects at the transistor level, use of strain in silicon, new materials etc.
Synopsys are the connector between design and manufacture, the bridge, the “On” within System-on-Chip.
The implication of all this is that fewer people have the skills to understand the entire spectrum of design. Synopsys staff consist of those doing deep physics e.g. 3D modelling of magnetic fields within the transistor, and system-level guys with a completely different skill set.
Do you expect this innovation to come from the main players or is there still room for specialist companies?
Yes, there is still room. Smaller companies are at the frontier of innovation, but point innovations for point problems are not useful stand-alone – they need to be absorbed into a systematic integrated system.
For example, Strained Silicon; can you have a package to model strain vs. mobility? Yes, it’s a good thing to develop, but the real value comes through doing this for 100,000 transistors at a time to impact a complete SoC design.
For example, Verification; more verification used to require faster simulation, but over the last 4-5 years just simulating a device became the bottleneck. By bringing together test bench technology, formal methods and assertion-based verification via SystemVerilog, Synopsys delivered 5 times better coverage.
The additional cost and time of getting finer geometry designs are really becoming clear. You've coined the term "Techonomics" to suggest that the advantages of scaling must impact the bottom-line and the additional costs must be taken into account in intelligent decision-making. Can you discuss further?
The up and downturn in 2000/2001 forced an industry maturity that was not previously there. An economic shift of that magnitude (down 46% year-on-year) meant a fundamental change in how the industry viewed economics as it realised going for increased speed through smaller geometries is not always the best way to make profit. For example, processor companies are now multi-core and greater speed is delivered via throughput rather than geometry.
This is all happening at a time when the consumer market is viciously driving costs downwards.
Tool licenses are sold at a premium in Europe. Is this further hindering the battle against off-shoring?
The EDA industry is in a global market and there is no longer a big difference in pricing, though every Purchasing Manager in the World will tell you he’s paying too much!
What specifically is Synopsys doing to encourage more innovation and start-ups??
Synopsys are engaged with many start-ups and are always trying to find ways to make our tools economically viable for them whilst being fair to those existing companies that are competing with them.
Start-ups have the advantage of starting without history (no legacy design flows, no design support personnel, no internal IP). They can capitalise on the more systematic and IP-based world today and simply use new optimised design flows “as-is” and the latest off-the-shelf IP blocks. Start-ups can streamline and focus on differentiation for their future success.
Synopsys has a new design environment called Pilot, providing a complete solution, and companies who adopt this from scratch are becoming more productive.
In the IT industry, many of the mature companies had problems overcoming legacy and are now out of business!
There's a view that the EDA industry needs closer co-operation and even collaboration in developing open standards, working together to crack the big issues; do you support this view?
Synopsys is a driver and leader of open standards. SystemVerilog was largely developed by Synopsys and is now open and available and we are actively involved in the Power standards and most language standards. A standard is whatever gets used in practice - things that really work!
Synopsys have worked with many partners; ARM in particular in the UK. Synopsys’ Verification Methodology Manual is one of the most rapidly selling books in EDA and, working with ARM, we have pioneered a new approach to Low Power design called the Intelligent Energy Manager.
NMI would like to thank Aart De Geus for providing his valuable time and insight for this interview.
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