What is the Developers' Forum?
This Forum provides EDA vendors and their customers an opportunity to exchange information and ideas on EDA tool interoperability including information on new interface technologies, future enhancements, upcoming news, and successes from developers and customers. Please join us in promoting increased interoperability in the EDA industry.
| Agenda Details for April 2008 Forum |
| 11:30AM - 12:15PM | Registration & Lunch |
| 12:15PM - 4:00PM | What’s New in VMM IPL Alliance
IPL Alliance will present the latest update of the initiative and a live product demonstration by key IPL Alliance members showing an interoperable PCell library that supports multiple tools including schematic capture, layout editing and design rule checkers.
The Power of One: UPF (Unified Power Format)
While the Unified Power Format 1.0 Accellera standard is the main workhorse in the industry today for low power EDA tools and flows, work is underway in the IEEE P1801 working group to further the capabilities of UPF 1.0. The P1801 work strives to bring in any additional low power flow needs remaining in the industry then extending UPF capabilities to support these needs. See the progress the P1801 working group is making. |
| 2:30PM - 4:30PM | Prize Raffle |
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Register for April 2008 Forum Limited space available!
Find out more about the Synopsys Interoperability Developers' Forums and see previous presentations at:
http://www.synopsys.com/partners/tapin/tapin_program.html
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