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DesignWare Root Port Core for PCI Express

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The DesignWare® Root Port (RC) Core for PCI Express® implements a configurable and scalable Root Complex interface for integration into ASICs and FPGAs providing designers with a high-quality IP that reduces risk and improves time-to-market. The silicon-proven DesignWare RC core is compliant to the latest PCI-SIG® and PIPE specifications and has been extensively validated with multiple hardware platforms, PHYs and PCIe verification suites. As the industry standard for PCI Express, Synopsys offers a comprehensive IP solution that is in volume production and has been successfully implemented in a wide range of applications.

The synthesizable core integrates quickly and easily into SoC designs with a user-friendly application interface and conservative timing suitable for a wide range of ASIC and FPGA technologies. The core is available in your choice of datapath widths, PIPE interface widths, and operating frequencies for optimization of size, power, and throughput. DesignWare PCI Express cores are fully compliant with the latest PCI Express Base Specifications and are used to power the industry's PCI Express compliance testing at PCI-SIG Compliance Workshops.

You can view all Synopsys PCI Express videos here.

DesignWare IP for PCI Express Complete Solution Datasheet
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DesignWare IP Root Port Controller IP for PCI Express Datasheet
DesignWare Z-Core IP for PCI Express Datasheet *Japan Only*
 

  • Designed according to the PCI Express 4.0, 3.1, 2.1, and 1.1 specifications, including the latest errata
  • Supports PIPE PHY interface definition including variable clock and variable data
  • Supports 16.0, 8.0, 5.0 and 2.5 Gbps line rates
  • Architecture supports x1, x2, x4, x8, and x16 lanes
  • Available in 32, 64, 128 and 256 bit data path widths for maximum flexibility
  • Optimal on-chip memory utilization and low latency
  • Bypass, cut-through and store-and-forward receive queues
  • Embedded DMA for increased performance
  • Full power management support
  • Advanced Error Reporting
  • Optional ECC on the RAMs
  • Optional Parity on the datapath and RAM
  • ASIC and FPGA support
  • Support for AMBA 3 AXI and AHB interfaces
PCI Express 1.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 1.0 Root Port - 32 bit (x1,x4), 64-bit (x2,x4,x8)STARsSubscribe
PCI Express 2.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 2.0 Root Port - 32 bit (x1,x4), 64-bit (x2,x4,x8)STARsSubscribe
PCI Express 3.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 3.0 Root Port - 32 bit (x1,x2), 64-bit (x1,x2,x4)STARsSubscribe

  Description PCI Express 1.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_rc_gen1_128b_256b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8791-0
  
  Description PCI Express 1.0 Root Port - 32 bit (x1,x4), 64-bit (x2,x4,x8)
  Name dwc_pci_express_rc_gen1_32b_64b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8790-0
  
  Description PCI Express 2.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_rc_gen2_128b_256b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8799-0
  
  Description PCI Express 2.0 Root Port - 32 bit (x1,x4), 64-bit (x2,x4,x8)
  Name dwc_pci_express_rc_gen2_32b_64b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8798-0
  
  Description PCI Express 3.0 Root Port - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_rc_gen3_128b_256b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8807-0
  
  Description PCI Express 3.0 Root Port - 32 bit (x1,x2), 64-bit (x1,x2,x4)
  Name dwc_pci_express_rc_gen3_32b_64b
  Version 4.30a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_rc
  Product Code 8806-0