HOME   IP   INTERFACE AND STANDARDS IP   PCI EXPRESS   DESIGNWARE ENDPOINT CONTROLLERS FOR PCI EXPRESS  
Language: 日本語

DesignWare Endpoint Controllers for PCI Express

Search Tools

Spotlight

The DesignWare® Endpoint (EP) Controller IP for PCI Express® implements a configurable and scalable Endpoint interface for integration into ASICs and FPGAs providing designers with a high-quality IP that reduces risk and improves time-to-market. The silicon-proven DesignWare EP Controllers are compliant to the latest PCI-SIG® and PIPE specifications and have been extensively validated with multiple hardware platforms, PHYs and PCIe verification suites.

As the industry standard for PCI Express, Synopsys offers a comprehensive IP solution that is in volume production and has been successfully implemented in a wide range of applications.

The synthesizable controllers integrate quickly and easily into SoC designs with a user-friendly application interface and conservative timing suitable for a wide range of ASIC and FPGA technologies. The controllers are available in your choice of datapath widths, PIPE interface widths, and operating frequencies for optimization of size, power, and throughput. DesignWare Controller IP for PCI Express are fully compliant with the latest PCI Express Base Specifications and are used to power the industry's PCI Express compliance testing at PCI-SIG Compliance Workshops.

You can view all Synopsys PCI Express videos here.

DesignWare IP for PCI Express Complete Solution Datasheet
DesignWare IP for PCI Express Single Root I/O Virtualization Datasheet
DesignWare IP for PCI Express to AMBA AXI3/AXI4 Bridge Datasheet
DesignWare IP for PCI Express to ARM AMBA AHB Interconnect
 



Prioritizing PCI Express 3.0 Bandwidth using DesignWare IP for PCIe
High-performance I/O applications require moving multiple threads of data simultaneously. The DMA engine of the DesignWare IP for PCI Express 3.0 offloads SoC resources and maximizes the bandwidth of PCI Express 3.0 at 8.0 GT/s. This video showcases the ability of the DMA engine of the DesignWare® IP for PCI Express 3.0 to efficiently allocate bandwidth across multiple channels based on the application's requirements.

Richard Solomon
Technical Marketing Manager

  • Designed according to the PCI Express 4.0, 3.1, 2.1, and 1.1 specifications, including the latest errata
  • Supports PIPE PHY interface definition including variable clock and variable data
  • Supports 16.0, 8.0, 5.0 and 2.5 Gbps line rates
  • Architecture supports x1, x2, x4, x8, and x16 lanes
  • Available in 32, 64, 128 and 256 bit data path widths for maximum flexibility
  • Optimal on-chip memory utilization and low latency
  • Bypass, cut-through and store-and-forward receive queues
  • Embedded DMA for increased performance
  • Legacy PCI, MSI and MSI-X interrupt support
  • Multi-function support
  • Full power management support
  • Advanced Error Reporting
  • ECC on the RAMs
  • Optional Parity on the datapath and RAM
  • Support for Single-Root I/O Virtualization (SR-IOV)
  • ASIC and FPGA support
  • Support for AMBA 3 AXI and AMBA AHB interfaces
PCI Express 1.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 1.0 Endpoint - 32 bit (x1,x4), 64-bit (x2,x4,x8)STARsSubscribe
PCI Express 2.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 2.0 Endpoint - 32 bit (x1,x4), 64-bit (x2,x4,x8)STARsSubscribe
PCI Express 3.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)STARsSubscribe
PCI Express 3.0 Endpoint - 32 bit (x1,x2), 64-bit (x1,x2,x4)STARsSubscribe
IP Prototyping Kit for PCIe 2.0 Dual Mode Ctrl, Endpoint Mode w/Host PC Conn. & Opt. ARC SDPSTARsSubscribe
IP Prototyping Kit for PCIe 3.0 Dual Mode Ctrl, Endpoint Mode w/Host PC Conn. & Opt. ARC SDPSTARsSubscribe

  Description IP Prototyping Kit for PCIe 2.0 Dual Mode Ctrl, Endpoint Mode w/Host PC Conn. & Opt. ARC SDP
  Name ip_prototyping_kit_pci_express_20_ep_pc
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  
  Description IP Prototyping Kit for PCIe 3.0 Dual Mode Ctrl, Endpoint Mode w/Host PC Conn. & Opt. ARC SDP
  Name ip_prototyping_kit_pci_express_30_ep_pc
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  
  Description PCI Express 1.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_ep_gen1_128b_256b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8789-0
  
  Description PCI Express 1.0 Endpoint - 32 bit (x1,x4), 64-bit (x2,x4,x8)
  Name dwc_pci_express_ep_gen1_32b_64b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8788-0
  
  Description PCI Express 2.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_ep_gen2_128b_256b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8797-0
  
  Description PCI Express 2.0 Endpoint - 32 bit (x1,x4), 64-bit (x2,x4,x8)
  Name dwc_pci_express_ep_gen2_32b_64b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8796-0
  
  Description PCI Express 3.0 Endpoint - 128 bit (x4,x8,x16), 256-bit (x8,x16)
  Name dwc_pci_express_ep_gen3_128b_256b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8805-0
  
  Description PCI Express 3.0 Endpoint - 32 bit (x1,x2), 64-bit (x1,x2,x4)
  Name dwc_pci_express_ep_gen3_32b_64b
  Version 4.40a
  STARs Open and/or Closed STARs
  myDesignWare Subscribe for Notifications
  Product Type DesignWare Cores
  Documentation
  Toolsets Qualified Toolsets
  Download dw_iip_DWC_pcie_ep
  Product Code 8804-0