Virtual Prototyping
Accelerate pre-RTL embedded software development, hardware/software integration, and system validation
Architecture Design
Quickly explore tradeoffs in your SoC architecture to achieve optimal product performance and cost to avoid over- or under-design
FPGA-Based Prototyping
Accelerate the creation of your ASIC prototype with a high-speed hardware prototyping environment including a comprehensive software flow
Core Optimization
Differentiate your product with the right combination of performance, power and area for your most design-critical cores
Design Flow Deployment
Optimize your design flow to address the latest design challenges
Physical Design Assistance
Leverage our tape-out proven flows and project experience to implement your very-deep submicron chip
IP Integration & SoC Verification
Get to market faster and reduce SoC design and verification cost by applying best practices in RTL creation and functional verification
Synopsys' DesignWare® HDMI™ 1.4a Receiver (RX) Controller and PHY IP solution provides the necessary logic to implement and verify designs for various consumer electronic applications. The
DesignWare HDMI 1.4a RX IP solution includes a suite of configurable digital controllers and high-speed, mixed-signal PHY IP, thus providing a comprehensive solution from a single IP vendor. Synopsys' DesignWare HDMI 1.4a RX IP provides designers with a high-performance HDMI sink solution that is extremely low in power and area. With multiple design wins and products shipping
in volume, Synopsys' expertise in developing and supporting its DesignWare HDMI 1.4a RX IP solution enables designers to achieve silicon-success for their advanced HDMI solutions.
The strict quality measures combined with support from an expert technical team enables designers to accelerate time-to-market and reduce integration risk for next-generation consumer electronic applications.DesignWare IP for HDMI RX IP Solution Datasheet
Silicon-proven DesignWare® HDMI TX Controller and PHY IP on Synopsys' HAPS-51 Platform
Synopsys shows how fixed video and audio patterns are transmitted by the DesignWare HDMI TX controller and PHY. See the image quality improve as resolution of video test pattern is increased from 480p to 720p to 1080p, 60 Hz frame formats. Also see the EDID info collected by TX Controller/PHY Display Data Channel (DDC) from the sink device (DTV) to support negotiation and find the best supported color format and frame rate.
Manmeet Walia Product Manager for Mixed-Signal PHY IP, Synopsys
A superior analog front end that supports up to 20 feet category 2-certified HDMI cables, while maintaining high performance
Digital controllers delivered in configurable RTL allows designers to optimize gate count and power consumption by choosing only the features required in their application
PHY offers low power consumption and small die area
Numerous optional features such as High-bandwidth Digital Content Protection (HDCP) encryption engine, various audio formats, audio DMA engine and multiple system-bus interfaces help to ease the integration effort
System validation based on the Synopsys Confirma HAPS-51 rapid prototyping platform
