Synopsys DesignWare HDMI 1.3 Receiver (RX) IP Solution

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INTERFACE AND STANDARDS IP

HDMI SOLUTIONS

SYNOPSYS DESIGNWARE HDMI 1.3 RECEIVER (RX) IP SOLUTION Japan

Synopsys DesignWare HDMI 1.3 Receiver (RX) IP Solution

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Analog IP Selector

Memory & Logic IP Selector

Synopsys' DesignWare® HDMI™ 1.3 Receiver (RX) controller and PHY IP solution provides the necessary logic to implement and verify designs for various consumer electronic applications. The HDMI 1.3 TX IP solution includes a suite of configurable digital controllers and high-speed, mixed-signal PHY IP, thus providing a comprehensive solution from a single IP vendor.Synopsys' DesignWare HDMI 1.3 RX IP provides designers with a high-performance HDMI sink solution that is extremely low in power and area. With multiple design wins and products shipping in volume, Synopsys' expertise in developing and supporting its DesignWare HDMI 1.3 RX IP sink solution enables designers to achieve silicon success for their advanced HDMI solutions. The strict quality measures combined with support from expert technical team enables designers to accelerate time-to-market and reduce integration risk for next-generation consumer electronic applications.

DesignWare IP for HDMI RX IP Solution Datasheet

Silicon-proven DesignWare® HDMI TX Controller and PHY IP on Synopsys' HAPS-51 Platform
Synopsys shows how fixed video and audio patterns are transmitted by the DesignWare HDMI TX controller and PHY. See the image quality improve as resolution of video test pattern is increased from 480p to 720p to 1080p, 60 Hz frame formats. Also see the EDID info collected by TX Controller/PHY Display Data Channel (DDC) from the sink device (DTV) to support negotiation and find the best supported color format and frame rate.

Manmeet Walia
Product Manager for Mixed-Signal PHY IP, Synopsys

Highlights
Products
Downloads and Documentation

A superior analog front end that supports up to 20 feet category 2-certified HDMI cables, while maintaining high performance
Digital controllers delivered in configurable RTL allows designers to optimize gate count and power consumption by choosing only the features required in their application
PHY offers low power consumption and small die area
Numerous optional features such as High-bandwidth Digital Content Protection (HDCP) encryption engine, audio formats, audio DMA engine and system-bus interfaces help to ease the integration effort
Compliance with HDMI and HDCP specifications

HDMI 1.3 RX Controller with HDCP

STARs

Description	HDMI 1.3 RX Controller with HDCP
Name	dwc_hdmi13_rx_hdcp
Version	1.32a
STARs	Open and/or Closed STARs
myDesignWare	Subscribe for Notifications
Product Type	DesignWare Cores
Documentation	Show Documents... Hide Documents... Databook DesignWare Cores HDMI 1.3 Receiver Controller Databook Datasheet DesignWare IP for HDMI 1.3 Receiver (RX) Controller Installation Guide DesignWare Cores HDMI 1.3 Receiver Controller Installation Guide Release Notes DesignWare Cores HDMI 1.3 Receiver Controller Release Notes User Manual DesignWare Cores HDMI 1.3 Receiver User Guide
Toolsets	Qualified Toolsets
Download	dw_iip_DWC_hdmi_rx
Reference Number	24310