SNUG Taiwan 2012 Proceedings

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Complete Proceedings


User Papers and Presentations
TA1 HPC
28nm Cortex-A9 Implementation
Author(s): Tommy Huang (Socle)
Presentation

Empower Computing Through ARM Mali GPU Implementation
Author(s): Tim Whitfield, ARM
Presentation

How to achieve best performance by customized HPC flow on high performance design
Author(s): Chung Chiao Chang (Ali)
Presentation

TA2 Verification
Creating AMBA4 ACE Test Environment With Discovery VIP
Author(s): Sean Chou, Whitney Huang (Mediatek)
PaperPresentation

Creating Low Power Assertion and Coverage with PAVE
Author(s): Shang-Wei Tu (MediaTek) Vikram Malik,Tiger Hsu (Synopsys)
PaperPresentation

Regression Management
Author(s): Richard An (Realtek)
Presentation

TA3 AMS
Co-Simulation Flow with Linear Performance of FineSim for NAND Flash
Author(s): Chi-Yu Hung (Macronix)
PaperPresentation

TSMC Presentation
Author(s):
Presentation

TSMC Presentation
Author(s):
Presentation

TB2 Syn/LP/FM
Achieving Higher Completion of Formality Equivalent Check
Author(s): Eddie Lee (Sunplus)
Presentation

Reduce datapath Power Consumption using Synopsys DesignWare minPower
Author(s): Duke Lin (Phison)
Presentation

Synthesize with UPF
Author(s): Don Wu (WonderMedia)
Presentation

TB3 System
A Full ESL Methodology for Hardware/Software Co-Design on Processor Based Architecture
Author(s): Yao-Hua Chen, Jen-Chieh Yeh (ITRI)
Presentation

WA1 Phy/LP
Efficient and Predictable Low Power Implementation Flow with UPF 2.0 and Case Study
Author(s): Eric Chen (Himaxms) Tony Wang (Synopsys)
Presentation

WA2 DFT/PT
AAA usage of AOCV: Adaptive table plus Accurate implementation with All-round signoff flow
Author(s): Jinson Huang (Mediatek)
PaperPresentation

Detecting Timing Defects by Using Small Delay Defect (SDD) Test Patterns
Author(s): Ying-Yen Chen, Jih-Nung Lee, Chi-Feng Wu, Ming-Chung Wu (Realtek)
PaperPresentation

WB3FPGA
ARM Cortex A9 Prototyping Tricks with Synopsys FPGA Solutions
Author(s): Chu Shih Chin (SIS)
Presentation

Prototyping for H.264 Low Power Application on Multimedia with HAPS51T
Author(s): Jeff Yang (ITRI)
Presentation

Using Synopsys HAPS System for Multimedia SOC prototyping
Author(s): Andy Lee (Skyviia)
Presentation

Tutorials
TA2 Verification
Achieving Rapid Verification Convergence with Synopsys’ Verification IP for ARM® AMBA® 4 ACE™ Interconnect
Author(s): Amit Sharma (Synopsys)
Tutorial

TA3 AMS
How to Get the Most Out of Your Circuit Simulation
Author(s): Titus Liang (Synopsys)
Tutorial

Silicon Smart
Author(s):
Tutorial

TB1 HPC
Techniques for High Performance Cores using Synopsys Galaxy Platform—ARM® Cortex™-A15 Case Study
Author(s): Harissh Swaminathan (Synopsys)
Tutorial

TB2 Syn/LP/FM
Improve design productivity with DC Explorer
Author(s): Wayne Wang (Synopsys)
Tutorial

TB3 System
Accelerate software development for ARM big.LITTLE processing
Author(s): Leo Chen (ARM) Tom De Schutter (Synopsys)
Tutorial

Designing Programmable Hardware Accelerators: Gaining Flexibility Without Compromising Power, Area and Performance
Author(s): Jiff Kuo (Synopsys)
Tutorial

WA1 Phy/LP
Going 3D By Evolution Rather Than By Revolution
Author(s): Steve Smith (Synopsys)
Tutorial

Intelligent & Automated Layer-Aware Pre-Route Optimization For Improved Post-Route Correlation
Author(s): Sam Chen (Synopsys)
Tutorial

WA2 DFT/PT
ECO Timing Closure: Fast and Flexible Multi-Scenario DRC Fixing
Author(s): Jerry Fang, (Synopsys)
Tutorial

Galaxy Constraints Analyzer: Comparing Multiple SDC Constraints Files
Author(s): Jerry Fang, (Synopsys)
Tutorial

WA3 IP
The Role of IP in a Changing Landscape
Author(s): John Koeter (Synopsys)
Tutorial

WB1 HPC
Faster Top-Level Closure with Transparent Interface Optimization (TIO)
Author(s): David Wang (Synopsys)
Tutorial

How to get low-power on high performance cores
Author(s): Lup Meng Lam (Synopsys)
Tutorial

WB3FPGA
Advanced Capabilities and Design Interaction with FPGA-Based Prototyping
Author(s): Freddy Lin (Synopsys)
Tutorial