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User Papers and Presentations
User Papers
A Fast Methodology Flow for IP Input and Max Output Cap Characterization
Author(s):
Peter H Chen, Harrison Liu, Peter Pong, Jim Wang, and Jerry Hong [Faraday Technology Corporation]
Paper
Presentation
A Systematic Approach to Trace Netlist for ECO
Author(s):
Ling-Bin Guo [Infineon-ADMtek]
Paper
Presentation
An Efficient RTL to GDSII Implementation Platform Based on Galaxy Design Environment
Author(s):
Jeff Hsieh [Sunplus Technolog Co, Ltd]
Presentation
Chip Level Planning Using JupiterXT
Author(s):
Hung-Yi Kuo and Jago Huang [ALI]
Presentation
Dissect Location-Based On Chip Variation
Author(s):
Jerry Hong, Erica Chang and JD Pan [Faraday Technology Corporation]
Paper
Presentation
Experience of Lower Power Design Methodology with Dynamic Frequency and Voltage Scaling in SoC Design
Author(s):
Dave Scott and Sachin Idgunji [Synopsys], Dar-Sun Tsien [UMC], Dave Flynn [ARM], Lumdo Chen [UMC]
Presentation
Improving Verification Productivity with VCS Native Testbench
Author(s):
Kuei-Ju Yang and CY Cheng [Realtek Semiconductor Corp]
Presentation
Leakage Power Optimizatoin for 0.13um Process Design
Author(s):
Wei-Liang Ying [Sunplus]
Presentation
Memory Model Verification in ESP-CV
Author(s):
Jia-Liang Chiou and Jian-Dai Pan [Faraday Technology Corporation]
Paper
Presentation
Noise Library for PrimeTime-SI
Author(s):
Peter Chih-Yang Pong and Steve H. Tsai [Faraday Technology Corporation]
Paper
Presentation
SI Solution Using Astro-Xtalk
Author(s):
Jerming Lin [VIA Technologies]
Presentation
Sub-100nm Technology Development and Optimization: Integration of TCAD with Yield Management
Author(s):
T. Akiyama, H. Yoshimura and S. Komatsu [Toshiba Corporation], L. Bomholt, G. Braun, C. Zechner, S. Krishnamurthy, H. Takada and W. Fichtner [Synopsys Inc], K. Zafar and E. Chang, [KLA-Tencor Inc]
Paper
Presentation
Timing Closure & Signoff Flow
Author(s):
Wen Hung Wu [ALi Corporation]
Presentation
Verification: Moving Toward the Next Generation
Author(s):
Chung-HsingChen [VIA Technologies Inc]
Presentation
SNUG Silicon Valley Keynote
Massive Innovation and Collaboration into the "GigaScale" Age!
- Synopsys
SNUG Silicon Valley Keynote
From Crystal Ball to Reality: The Impact of Silicon IP on SoC Design
- Imagination Technologies
Snug Proceedings
Proceedings
Germany, 2013
India, 2013
Silicon Valley, 2013
UK, 2013
Austin, 2012
Boston, 2012
Canada, 2012
France, 2012
Germany, 2012
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