SNUG Germany 2011 Proceedings

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User Papers and Presentations
A1 Tutorial & User Paper - Implementation: Synthesis
Multi-Mode Multi-Corner Synthesis in Design Compiler - A Must or just Nice to Have? (2nd Place - Best Paper, Technical Committee Award Honorable Mention)
Author(s): Bernhard Riess [Infineon Technologies AG]
PaperPresentation

A2 User Session - Implementation: Place & Route I
Inserting and Integrating Level Shifters during Physical Implementation (ICC)
Author(s): Kousalya Nagakarthick, Ralph Sommer [LSI Logic GmbH]
PaperPresentation

Mixed-Vth Leakage Optimization in the Final Design Stage - Experience with new Final-Stage Leakage Recovery Flow (3rd Place - Best Paper)
Author(s): Robert Häußler, Mihael Murković [Lantiq Deutschland GmbH], Anders Lind [Synopsys GmbH]
PaperPresentation

Using Synopsys IC Compiler for DFM optimization at 28nm
Author(s): Rainer Mann, Ulrich Hensel, Vito Dai, Shobhit Malik [GLOBALFOUNDRIES], Jens Peters [Synopsys]
PaperPresentation

A3 Tutorial & User Paper - Verification & IP: Digital Verification
Method for Reusable Low Power Mode Entry/Exit Verification Applied on Freescale S12 uC
Author(s): Joachim Geishauser, Alexander Schilling, Andreas Pachl [Freescale Halbleiter Deutschland GmbH]
PaperPresentation

A4 User Paper & Tutorial - AMS/Full Custom: AMS Verification I
A Simple but Effective and High Accurate Parasitics Estimator for Prelayout Parasitic Estimation
Author(s): Hendrik Mau [GLOBALFOUNDRIES]
PaperPresentation

A5 User Session & Tutorial - System: High Level Synthesis & Verification
Employing Synphony Model Compiler with Application Components for FPGA Processing Elements in Software Defined Radios
Author(s): Peter Troll [Rohde & Schwarz GmbH & Co. KG]
PaperPresentation

Formal Verification and Validation of High-Level Optimizations of Arithmetic Datapath Blocks
Author(s): Theo Drane [Imagination Technologies Ltd.], Himanshu Jain [Synopsys, Inc.]
PaperPresentation

B1 User Session - Signoff: STA and Constraint Analysis
Galaxy Constraints Analyzer Evaluation
Author(s): Sönke Grimpen [Infineon Technologies AG]
PaperPresentation

Path-based Analysis : A Realistic Solution to Unrealistic Timing Paths in Complex ASICs (Technical Committee Award)
Author(s): Satinder Paul Singh, Farid Labib [LSI Corp. Germany]
PaperPresentation

STA Fundamentals (1st Place - Best Paper)
Author(s): Sönke Grimpen [Infineon Technologies AG]
PaperPresentation

B3 Tutorial & User Session - Verification & IP: IP integration
Chips and IPEAS - It’s not Mushy
Author(s): Jonathan Young [Synopsys Ltd.], Presenter: Steve Lloyd [Synopsys Ltd.]
PaperPresentation

Evaluation of an on Chip Bus Fabric Solution Based on Synopsys IPs
Author(s): Bogdan Sbarcea [Siemens Romania], Majid Gameshlu [Siemens Austria], Andreas Vielhaber [Synopsys GmbH]
PaperPresentation

B5 User Paper & Tutorial - System: SoC Architecture Design
Developing High-performance Wireless Systems by Combining Virtual Prototype Models
Author(s):
PaperPresentation

B6 Combo Session - Automotive: Automotive System Design & Analysis
Electrical Function & System Development of Commercial Vehicles at Volvo using Saber
Author(s): Samuel Alinder [Volvo Sweden]

SABER Simulation of Electric Actuators
Author(s): Dr. Szabo, Dr. Moule [TRW Automotive Systems]

Setting up an Enterprise-wide Automotive Model Library - Potentials, Requirements and Challenges
Author(s): Armin Schön [Continental Automotive Systems GmbH]

C1 Tutorial & User Session - Implementation: Low Power
Hierarchical UPF Implementation and Verification
Author(s): Knut Dalkowski [Synopsys GmbH]
PaperPresentation

C2 User Paper & Tutorial/Demo Session - Test: Compression and Volume Diagnostics
Improving DFTMAX Compression Results in Latch Based Designs
Author(s): Richard Illmann [Dialog Semiconductor]
PaperPresentation

C4 User Paper & Tutorial - AMS/Full Custom: Analog Implementation
Deployment of Custom Designer for the 40nm Design Flow at Lantiq
Author(s): Michael Wagner, Johannes Rauh [Lantiq Deutschland GmbH], Oliver Bär [Synopsys GmbH]
PaperPresentation

C5 User Paper & Tutorial - FPGA: HW Assisted Verification
FPGA-based Validation of TV Signal Demodulation Algorithms Using the Xilinx Virtex-6 based HAPS-62 Platform
Author(s): Rolf Nöthlings [Sony Deutschland GmbH]
PaperPresentation

C6 Combo Session - Automotive: Virtual Prototyping of HW/SW Systems
Virtual Platform for a Chassis and Safety Application
Author(s): M. Thanner [Freescale]

Publication Only
Leakage Power Optimization Flow for Low Power Designs
Author(s): Ramy Gamal [Dubai Circuit Design]
Paper

Synthesizable Verification IP to Stress Test System-on-Chip Emulation and Prototyping Platforms
Author(s): Xu Bing Tao, Jayaratnam Siva Shankar, Subramanian Shiva Shankar [Lantiq]
Paper

Tutorials
A1 Tutorial & User Paper - Implementation: Synthesis
DesignWare minPower Components
Author(s): Michael Confal [Synopsys GmbH]
Tutorial

A4 User Paper & Tutorial - AMS/Full Custom: AMS Verification I
Circuit Check: Discover Circuit Design Errors in Low Power SoCs
Author(s): Luong Nguyen [Synopsys France]
Tutorial

A5 User Session & Tutorial - System: High Level Synthesis & Verification
Recursive Hierarchical Compilation using Synphony C Compiler
Author(s): Frédéric Génin [Synopsys France]
Tutorial

A6 Tutorials & Demo - Automotive: Introduction & Overview
Automotive System Electrification through Virtual Design & Verification: Synopsys Solutions & Directions
Author(s): David W. Smith [Synopsys, Inc.]
Tutorial

A6 Tutorials & Demo - Automotive: Introduction & Overview
Incremental Design Flows for Highly Complex FPGA Designs
Author(s): Philipp Jacobsohn [Synopsys GmbH]
Tutorial

B2 Tutorials - Implementation: Place and Route II
Eliminating Late-Stage Manual Fixes with In-Design Physical Verification
Author(s): David DeMarcos [Synopsys Italy]
Tutorial

Template-Based Power Planning in IC Compiler
Author(s): Jens Peters [Synopsys GmbH]
Tutorial

B3 Tutorial & User Session - Verification & IP: IP integration
VCS ProductivityTools and Technologies that Help Reduce the Ever-Growing Verification Cycle
Author(s): Werner Kerscher [Synopsys GmbH]
Tutorial

B4 Tutorial & Demo Session - AMS/Full Custom: AMS Verification II
AMS-Testbench: An Innovative Methodology for Verifying Mixed-Signal Components
Author(s): Fabian Delguste [Synopsys France]

Introducing CustomExplorer Ultra
Author(s): Dwayne Holst [Synopsys, Inc.]
Tutorial

B5 User Paper & Tutorial - System: SoC Architecture Design
Performance Analysis for AMBA-Based SoC Design
Author(s): Gunnar Braun [Synopsys GmbH]
Tutorial

C1 Tutorial & User Session - Implementation: Low Power
New Multi-Voltage Power Optimization Techniques to Address Power Reduction During Design Implementation
Author(s): Michael Confal [Synopsys GmbH]
Tutorial

C2 User Paper & Tutorial/Demo Session - Test: Compression and Volume Diagnostics
Volume Diagnostics: The Key to Faster Yield Ramp at Nanometer Node Technologies
Author(s): Nikolaus Mittermaier, Christophe Suzor [Synopsys GmbH]
Tutorial

C3 Tutorial - Verification & IP: Processor Cores
Configuring DesignWare ARC Processors to your Embedded or Host SoC Application
Author(s): Martyn Bronziet [Synopsys Ltd.]
Tutorial

C4 User Paper & Tutorial - AMS/Full Custom: Analog Implementation
Synopsys Custom Design Solution
Author(s): Oliver Bär [Synopsys GmbH]
Tutorial

C5 User Paper & Tutorial - FPGA: HW Assisted Verification
Advanced Capabilities and Design Interaction with FPGA-Based Prototyping
Author(s): Mick Posner [Synopsys, Inc.]
Tutorial

Demo
A6 Tutorials & Demo - Automotive: Introduction & Overview
Assisting Virtual Prototyping with Hardware Based Methods
Author(s): Robert Eichner [Synopsys GmbH]
Tutorial

C6 Combo Session - Automotive: Virtual Prototyping of HW/SW Systems
Demo: A Virtual e200 Multicore Microcontroller
Author(s): Gunnar Braun [Synopsys GmbH]