Thursday, September 12, 2013Time: 4:45 - 7:00pm
Location: Salon D-H This event is open to all registered attendees of SNUG Boston. 
SNUG Boston DCE 2012 offered SNUG users the chance to network with colleagues and Synopsys technical and executive staff, visit representatives from our 22 partner and 7 Synopsys booths, while enjoying food and drinks. Prize drawings were held throughout the evening.
The companies who exhibited in 2012 are listed below. Check back for more details about the 2013 event!
Compute & Design Infrastructure
Community focused on compute technologies for EDA, including hardware, operating systems, licensing, multi-core, data mgmt., cloud computing, and compute/design infrastructure providers
 Silver Sponsor |  Silver Sponsor |  | | |  | | | |
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Custom Design & AMS Verification
Community focused on custom design and AMS verification flows, including schematic entry, layout, schematic-driven layout, P-cell, analog/ mixed-signal/ signal integrity simulation and custom design/AMS ecosystem partners (PDK foundry support/standards)
FPGA
Community focused on FPGA design and verification flows, including FPGA synthesis, implementation, and debug, and FPGA ecosystem partners (FPGA vendor platforms & device support)
IC Design
Community focused on cell-based design and flows, including design planning, RTL synthesis and test, physical implementation and verification, signoff and supporting IC design ecosystem partners (Library vendors, foundries and standards)
 Gold Sponsor |  |  Platinum Sponsor | | |  Silver Sponsor | | | |
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IC Verification
Community focused on functional verification and debug flows, including mixed-HDL simulation, testbench automation, verification IP, formal analysis, FPGA-based prototyping and IC verification ecosystem partners (VIP vendors/standards)
IP
Community focused on IP solutions for IC/SoC designs, including interface IP, analog IP, datapath IP, processors, embedded memories, logic libraries and ecosystem solution partners/standards
System-Level Design
Community focused on system-level design to implementation-ready RTL, including: high-level block design (HLS, algorithms, and custom processor design); architecture analysis and optimization; pre-silicon software development, integration, and system validation; and ecosystem system design vendors/standards