Synopsys Verification IP for MIPI DSI
Synopsys® VIP solution for MIPI Display Serial Interface (DSI) helps the verification of DSI Hosts or DSI Devices. MIPI-DSI VIP supports both High Speed (HS) transmission and Escape Mode. In Escape Mode it supports Ultra Low Power State (ULPS), Low Power Data Transmission (LPDT), Trigger messages and Bus Turnaround. It simplifies testbench development by enabling engineers to use a single VIP to verify multiple transmission modes across the full DSI protocol. It includes many new features to accelerate testbench development. Synopsys VIP for MIPI DSI is integrated with the Synopsys VIP Protocol Analyzer, a protocol-centric debug environment that gives users an easy to understand, graphical view of complex and highly interleaved traffic. Synopsys VIP solution for MIPI DSI includes a sequence library to accelerate testbench development.
||D-PHY, Serial and PPI
||UVM, VMM, OVM, Verilog
||VCS, Questa, IUS