Synopsys' FPGA-based ZeBu emulators hold the promise of extremely high execution speed, and enable the verification of system-level scenarios that require billions of execution cycles. For large ASIC designs, the key to RTL synthesis for emulation is quickly producing an emulation-friendly netlist that is debug-friendly. zFAST (ZeBu Fast Synthesis) is a Xilinx® Virtex® FPGA synthesis tool from Synopsys, specifically targeted for use with ZeBu emulators, and supporting SystemVerilog, Verilog, VHDL, and mixed language designs. zFAST is fully integrated into the Synopsys toolset, and enhances ZeBu emulation by providing extremely fast parallel and incremental synthesis, support for non-synthesizable constructs and memory inference, and enabling greater debug capabilities.
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