Virtual Prototyping
Accelerate pre-RTL embedded software development, hardware/software integration, and system validation
Architecture Design
Quickly explore tradeoffs in your SoC architecture to achieve optimal product performance and cost to avoid over- or under-design
FPGA-Based Prototyping
Accelerate the creation of your ASIC prototype with a high-speed hardware prototyping environment including a comprehensive software flow
Core Optimization
Differentiate your product with the right combination of performance, power and area for your most design-critical cores
Design Flow Deployment
Optimize your design flow to address the latest design challenges
Physical Design Assistance
Leverage our tape-out proven flows and project experience to implement your very-deep submicron chip
IP Integration & SoC Verification
Get to market faster and reduce SoC design and verification cost by applying best practices in RTL creation and functional verification
This is the IEDM 2012 edition of the TCAD News. This year marks a new chapter of CMOS innovation with the production release of 22nm FinFET technology to the market, and the semiconductor industry representatives gathering at IEDM will have much to be excited about advancing the FinFET technology below 10nm. Memory technologies are also evolving rapidly, with 3D NAND providing a near term pathway for extending the scaling of Flash technology, and new architectures such as spintransfer torque and resistive RAM undergoing intensive research and development.
Required Fields
