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Star-RCXT Webinar

Extraction Techniques to Accelerate High-Capacity Simulation

Are you concerned about the increasing design sizes and simulation run-times?
Are you worried about the impact of new parasitic effects on accuracy?
Is simulation performance straining your productivity and the project schedule? �

If yes, please join our free webinar (including a Q&A) to learn how you can use Synopsys� Star-RCXT™ to accelerate simulation of large designs with CustomSim™ simulation solution!

Overview
Post-layout simulation runtimes are increasing 2-4x with every new process generation as chip transistor counts double and new parasitic effects come into play. The latest extraction features in Star-RCXT can enable up to 10x speed-up in simulation runtime while preserving golden accuracy. In this webinar our experts will explain innovative techniques, such as "context-specific" and "active-node" based extraction, to boost simulation performance and capacity for your custom digital, memory or AMS designs.

Premieres: April 22, 2009 - 8:00 a.m. PDT
Estimated duration: 1 hour

Who should attend: Design engineers and managers�who are familiar with transistor-level extraction, and would like to know more about improving simulation performance and capacity.

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