FPGA Implementation Tools White Paper Download

The Great Divide: Why Next-Generation FPGA Designs will be Hierarchical and Team-Based

As field-programmable gate arrays (FPGAs) have grown in capacity, complexity and performance, their associated design and verification tools, infrastructures and methodologies have struggled to keep up.Today's FPGAs may contain the equivalent of millions of logic gates and run hundreds of thousands of lines of embedded software. Such designs may involve multiple hardware design teams, software development teams and verification teams located around the globe. In order to address designs of this size and complexity it is necessary to employ what is known as hierarchical team-based design. This paper first considers the evolution of FPGAs and FPGA design. Next, the concepts of top-down and divide-and-conquer design flows are introduced. Also discussed are considerations and capabilities required to support true hierarchical team-based design along with content management and design reuse considerations.

Please complete the following form then click 'continue >>' to complete the download.   Note: By registering, you acknowledge and agree to the terms of the Synopsys Privacy Policy.

Required Required Fields

Business Email:Required
First Name:Required
Last Name:Required
Job Role:Required
Job Title:Required
Address 1:Required
Address 2:Optional
Postal/Zip Code:Required

How is your current FPGA design being used? Required

What is the primary challenge you face in FPGA design? Required

What is a secondary challenge you face in FPGA design? Required

(requires browser cookies to be enabled)