minPower Components
Low power datapath architectures and instantiable IP extends battery life in mobile applications and reduces power consumption for SoCs
Are your high-speed serial link simulations taking too long?
Want to speed up your eye diagram generation and ISI predictions by 100X?
If so, please join us for a free, informative technical webcast about how to speed up high-speed serial link analyses and get the most out of the new statistical eye diagram capability in HSPICE!
Overview Getting statistically-accurate predictions of inter-symbol interference (ISI) in high-throughput serial interfaces can require data stream simulations that are millions of bits long, and using traditional transient simulation approaches is very computationally expensive. A new approach is now available in HSPICE that uses fast statistical and convolution methods to directly generate eye diagram statistics. This new statistical eye diagram technique allows eye diagrams to be evaluated quickly and accurately. The result is convenient characterization of high-speed serial interfaces for fundamental statistical metrics including eye closure, bit error rate (BER), and bathtub curves.
Who should attend: IC and board-level analog design engineers and managers interested in signal integrity.
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