DesignWare USB 2.0 nanoPHY Whitepaper

HELPING YOU DESIGN THE CHIP INSIDE


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DesignWare® USB 2.0 nanoPHY Whitepaper

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1. When are you planning to use the USB 2.0 PHY in your design?
       0-6 months
       6-12 months
       over 12 months
       Not planning

Required 2. What technology process are you targeting? (Check all that apply)
       65nm LP
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       130nm LP
       130nm G
       90nm LP
       90nm G
       Other, please specify:

Required 3. What USB 2.0 PHY configuration will you require?
       Single Port
       Multi-Port, please specify number of ports:
       On-the-Go (OTG)

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