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SNUG Boston 2009 Proceedings

Complete Proceedings

User Papers and Presentations
MA1 - Coverage
CovVise: How We Stopped Throwing Away Interesting Coverage Data
Author(s): Wilson Snyder [Veripool.org], Robert Woods-Corwin [NVIDIA]
Paper Presentation

Jazz Up Your Coverage Reports with VMM Planner
Author(s): John Stiles [Silicon Logic Engineering]
Paper Presentation

MA2 - XA
LSI Transistor-Level Verification Using XA
Author(s): Amy Rittenhouse, Jianjun Liu, Richard Stephani, Andrew Cable [LSI Corp.]
Paper Presentation

XA Verification in Implantable Medical Design (1st Place - Best Paper)
Author(s): Garrett Marshall, Jalpa Shah, Scott Stanslaski [Medtronic], Joseph Perttu [Synopsys]
Paper Presentation

MA3 - Easier Design Closure Using DC and DCT
RTL Structural Analysis Using Design Compiler (Technical Committee Award)
Author(s): Pete Nixon, Paul Rotker, Matt Cohen, Keith Morse, Bandish Shah [Sun Microsystems]
Paper Presentation

Stop Being Passive - Be Active with DCT
Author(s): Christopher Krueger [STMicroelectronics], Alex Fatehali [Synopsys, Inc.]
Paper Presentation

MA4 - ICC Usage
Predictable and Repeatable Feedthrough Floorplanning Using ICC (Technical Committee Award Honorable Mention)
Author(s): Franklin Bodine, Chris McGlone, Duane Galbi [Intel Corp.]
Paper Presentation

The Benefits of MCMM with Multi-Corner Timing Closure
Author(s): Tim Houlihan [Cypress Semiconductor]
Paper Presentation

MB1 -SystemVerilog & VMM
Building a Best Practice VMM Interface VIP Template
Author(s): Ning Guo, Jeff Wilcox, Rich Musacchio [Paradigm Works]
Paper Presentation

E To SystemVerilog Conversion (Technical Committee Award Honorable Mention)
Author(s): Premkishore Shivakumar [Intel Corp.], Alex Wakefield, Jason Chen [Synopsys, Inc.]
Paper Presentation

SystemVerilog's Virtual World - An Introduction to Virtual Classes, Virtual Methods and Virtual Interface Instances (2nd Place - Best Paper)
Author(s): Clifford Cummings [Sunburst Design, Inc.], Heath Chambers [HMC Design Verification, Inc.]
Paper Presentation

MB2 - HSPICE and HSIM
How to Get Maxwell and Kirchhoff to Shake Hands Using HSIM/WaveView for EMI Analysis
Author(s): Cornelia Golovanov [LSI Corp.], Cheung Lam [Synopsys]
Paper Presentation

HSPICE Aided S-Parameter Embedding and De-Embedding for High Speed Interface Compliance Testing
Author(s): Johann Nittmann, Frank Corcoran [Cavium Networks]
Paper Presentation

Multi-Gigabit Serial Link Analysis Using HSPICE and AMI Models (3rd Place - Best Paper)
Author(s): Douglas Burns, Barry Katz, Walter Katz, Mike Steinberger, Todd Westerhoff [SiSoft]
Paper Presentation

MB4 - ICC and IC Validator
Design Rule Check Classification System with IC Validator (Best First-Time Presenter)
Author(s): Pavel Rott [Intel Corp.]
Paper Presentation

MB6 - Test
Breaking the Hierarchy Rules: An Advanced Hierarchical DFT Strategy for a 5 Million Flop Design
Author(s): Charles Njinda [Cisco Systems]
Paper Presentation

Small-Delay Defect Testing of a High-Volume Server
Author(s): Francisco Duran-Urrea [Advanced Micro Devices], Don Skinner [Synopsys, Inc.]
Paper Presentation

Testing Latch Dominated Designs from a Mixed-Signal and Low-Power Domain
Author(s): Richard Illman, Hans Martin von Staudt [Dialog Semiconductor]
Paper Presentation

MC1 Simulation and Testbenches
Accelerating Simulation Performance using VCS in a CPU/GPU Integrated Verification Environment
Author(s): Sonu Arora, Madhuri Nallapaneni, Alex Miretsky, Peter Chi Wing Ng [Advanced Micro Devices]
Paper Presentation

Innovative Testbench Approach for Multi-ASIC Simulation
Author(s): Martin Blouin [Cisco Systems]
Paper Presentation

MC3 - Agile Programming and MVSIM
A Giant, Baby Step Forward: Agile Techniques for Hardware Design
Author(s): Neil Johnson, Bryan Morris [XtremeEDA Corp.]
Paper Presentation

Low-Power Verification of Multi-Rail Cells in RTL
Author(s): Ramanan Balakrishnan, Borhan Roohipour, Balakrishnamohan Kanukollu [Advanced Micro Devices], Vikram Malik, Tushar Parikh [Synopsys, Inc.]
Paper Presentation

MC4 - Zroute and IC Compiler
To Z or not to Z
Author(s): Jeff Shi [LSI Corp.]
Paper Presentation

Tutorials
MA5
Tips and Tricks for FPGA Synthesis, Debug, and Faster Turnaround Time
Author(s):
Tutorial

MA6
Power-Aware DFT/ATPG and Technical Updates
Author(s):
Tutorial

MB3
Advanced Synthesis Methodologies with the Lynx Design System
Author(s):
Tutorial

Design Compiler Graphical - Addressing Routing Congestion During RTL Synthesis
Author(s):
Tutorial

Verifying Power Intent with MVRC & Formality
Author(s):
Tutorial

MB4
ECO Flows Using ICC
Author(s):
Tutorial

In-Design Physical Verification for Faster Time-to-Tapeout and Improved DFM
Author(s):
Tutorial

MB5
CHIPit Use Models for Hardware Verification and Validation
Author(s):
Tutorial

MC2
Solving Signal Analysis Challenges with WaveView
Author(s):
Tutorial

MC4
Handling Very Large Designs in ICC Using a Reduced Netlist Flow
Author(s):
Tutorial

MC5
Synplicity - New Technology for ESL Design and FPGA Synthesis
Author(s):
Tutorial

TA1
Interactive Coverage Analysis and Exclusion with DVE and URG
Author(s):
Tutorial

TA2
Synopsys' Custom Design Solution
Author(s):
Tutorial

TA3
What's New in Design Compiler 2009.06
Author(s):
Tutorial

What's New in PrimeTime 2009.06
Author(s):
Tutorial

TA4
Improving RTL-to-GDSII Design Efficiency with Lynx Design System
Author(s):
Tutorial

TB1
VCS 2009.06 Update
Author(s):
Tutorial

VCS Performance and Memory Profiling
Author(s):
Tutorial

VMM 1.2 Introduction
Author(s):
Tutorial

TB3
What's New in IC Compiler 2009.06
Author(s):
Tutorial

TB4
Advanced On-Chip Variation
Author(s):
Tutorial

Faster Timing Closure in a Multi-Scenario World
Author(s):
Tutorial

Power Analysis
Author(s):
Tutorial