|Oct 27, 2014||SK Hynix Accelerates Memory Development with Productivity-Enhancing Debug Apps on Synopsys Verdi|
VC Apps open APIs automate memory testbench generation and debug. SK Hynix, Inc. has addressed their debug challenges by adopting the Synopsys VC Apps open application programming interfaces (APIs) to directly link their internally developed test generation technology to the industry-leading Synopsys Verdi® debug solution and allow their design and verification teams to customize their debug experience and boost debug productivity.
|Oct 14, 2014||Synopsys Enables Superior Verification Planning and Coverage Analysis with Verdi Coverage|
Verdi Coverage enables users to understand project progress, manage regression data, launch verification jobs, track project trends, generate reports and ultimately optimize resource allocation. This solution addresses the growing challenge of verification closure for complex system-on-chips (SoCs) by introducing advanced technology that allows users to quickly create efficient verification plans, integrate third-party and user-defined metrics, link plans to requirement documents, and intuitively track project and test-level metrics across simulation, static checking, formal verification, VIP and FPGA-based prototyping.
|Sep 23, 2014||Synopsys Unveils Verification Continuum to Enable Next Wave of Industry Innovation in Software Bring-Up for Complex SoCs|
Next-generation verification platform to accelerate time-to-market by months. The Synopsys Verification Continuum platform accelerates industry innovation for earlier software bring-up and shorter time-to-market for advanced SoCs. Verification Continuum is built from Synopsys' market-leading and fastest verification technologies providing virtual prototyping, static and formal verification, simulation, emulation, FPGA-based prototyping and debug in a unified environment with verification IP, planning and coverage technology.
|May 28, 2014||Synopsys Bridges Design and Verification with Next-Generation Static and Formal Technology for Verification Compiler|
Synopsys announces the availability of its VC Formal comprehensive formal verification solution, and VC CDC and VC LP advanced static checking solutions. These solutions address the growing verification challenges of complex SoCs by introducing next-generation verification technology that finds bugs earlier, faster and more accurately, as well as accelerates root-cause analysis.
|Apr 23, 2014||Synopsys Announces Industry's First Complete LPDDR4 IP Solution for High-Performance, Low-Power Mobile SoC Designs|
PHY, Controller and Verification IP Deliver up to 3200 Mbps Speeds for High-End Smartphones and Tablets
|Mar 25, 2014||Synopsys Unveils Advanced Mixed-Signal Verification Initiative to Accelerate Regression Testing of Mixed-Signal SoCs|
Initial Components of Initiative Extend Proven Verification Methodology and Technologies for Mixed-Signal Applications
|Mar 04, 2014||Synopsys Introduces Verification Compiler to Enable 3X Productivity|
Synopsys Introduces Verification Compiler to enable 3X productivity and deliver next-generation software technologies for complete verification flow. Verification Compiler is a complete portfolio of integrated, next-generation verification technologies that include advanced debug, static and formal verification, simulation, verification IP and coverage closure to create a complete functional verification flow with a single product.
|Feb 25, 2014||Synopsys Delivers Industry’s Fastest Emulation System|
ZeBu Server-3 speeds hardware-software bring-up, OS boot and SoC verification by up to 4X for faster time-to-market on even the largest designs
|Feb 25, 2014||Imagination Technologies and Synopsys Collaborate to Enable Faster Emulation|
ZeBu Server-3 emulator achieves 3.5 MHz performance on PowerVR Series 6 GPU to speed driver development and SoC verification
|Oct 14, 2013||Synopsys and TSMC Collaborate to Deliver 16-nm Custom Design Reference Flow |
TSMC Certifies Analog/Mixed-Signal Products for 16-nm Design Requirements
|Mar 19, 2013||Micronas Standardizes on Synopsys’ Design and Verification Solutions for Automotive Designs|
Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform
|Feb 07, 2013||Latest Advances in FineSim Deliver Up to 2X Performance and Capacity Improvements|
Enhancements Accelerate Verification of Advanced-node Memory Designs
|Jan 30, 2013||Imagination Technologies Selects Synopsys as Advanced Verification Technology Partner|
Multi-year Collaboration Results in Deployment of Synopsys' Advanced Formal Debug Technology for Verification of PowerVR Graphics Intellectual Property (IP) Cores
|Jan 21, 2013||Freescale Boosts Verification Productivity with Synopsys Verification IP|
Companies extend system-on-chip (SoC) verification collaboration on simulation, debug and verification IP.
|Oct 29, 2012||Synopsys Extends Support for ARM AMBA Protocol Verification with New Performance Checker for AMBA 4 AXI4|
Next-generation Discovery Verification IP Enables Identification and Debug of SoC Performance Bottlenecks.
|Feb 28, 2012||BiTMICRO Selects Synopsys for Chip Design Automation|
Two third-generation SSD controllers taped out using Synopsys' Galaxy Implementation and Discovery Verification Platforms
|Jan 25, 2012||Synopsys Collaborates with Sigrity to Accelerate Signal Integrity Analysis|
Combination of HSPICE and Sigrity Solution Delivers Up to 3X Speed-up for SI Analysis
|Oct 25, 2011||eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs|
Comprehensive Solution Enables Rapid Ramp-up and Delivery of Advanced Custom IP
|Oct 13, 2011||LG Electronics Accelerates Analog Simulation by 10X with Synopsys CustomSim|
LG Electronics Adopts CustomSim for Mixed-signal SoC Verification
|Jul 11, 2011||Synopsys and GLOBALFOUNDRIES Collaborate to Deliver 65nm iPDKs|
Synopsys and GLOBALFOUNDRIES Collaborate to Deliver Interoperable Process Design Kits (iPDKs)
Synopsys Custom Design Solution Now Supported by GLOBALFOUNDRIES 65nm Process Technologies
|Jun 13, 2011||Synopsys Custom Design Solution Enables Moortec Semiconductor to Tape Out High-performance Analog IP|
Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries
|Apr 18, 2011||Synopsys Advances Mixed-Signal Verification with New CustomExplorer Ultra|
Advanced Regression and Analysis Environment Streamlines Mixed-signal Verification and Boosts Productivity
|Mar 15, 2011||Synopsys Mixed-signal Verification Solution Delivers 5X Speed-up at Amlogic|
CustomSim and VCS Solution Enables Fast Turnaround Time for SoC Verification
|Oct 13, 2010||Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation|
Silicon-Accurate Results and 6X Faster Performance Cited as Key Decision Criteria