Low Power Verification  

Reduce Respins and Accelerate Innovation with Low Power Verification 

Power-aware verification of advanced low power designs (analog and digital) is a top concern for products at 65 nm and below. Voltage-aware functional verification in Synopsys' advanced low power solution is comprised of VCS Native Low Power (NLP) simulation with MVSIM NLP, and MVRC, a voltage-aware static checker that offers comprehensive coverage for all advanced power management functions. The voltage-aware checking, modeling and simulation technology in MVSIM NLP and MVRC provide the needed accuracy and verification coverage for all low power designs, including the most advanced mobile SoCs with fine-grained power management. MVSIM NLP and MVRC support comprehensive rules checking and analysis of power state transitions, power shutdown, and multi-rail macros and the like, to enable designers to rapidly find and fix low power bugs. HSPICE and CustomSim test for non-digital effects, such as leakage power, floating nodes and dynamic IR drop. The overall result is a completely verified power-managed design.

  • Tools
  • Functional Verification
  • Static and dynamic verification of low power designs 

The MVSIM NLP mode equips VCS with voltage-aware native low power simulation capability, with support for all advanced power management techniques, including DVFS, shutdown/retention and multi-rail macros.

A voltage-aware static checker enabling rapid power management verification without the need for a testbench

  • Transistor-level Verification
  • Performance, accuracy and capacity for low power AMS verification 

Hierarchical, full-chip circuit simulation and analysis

Gold standard for accurate circuit simulation

Combines HSIM, NanoSim & XA into a single unified solution

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