VC Verification IP for USB 


Synopsys® VC Verification IP for USB provides a comprehensive set of protocol, methodology, verification and productivity features, enabling users to achieve rapid verification of USB Hosts, Devices and Hubs with support for Super Speed, High speed, and Full Speed, Extended Super Speed, and Low Speed modes.

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VC USB Verification IP

Primary Protocol Features
  • Supports USB 3.1, 3.0 and 2.0 standards
    • SuperSpeed Plus, Superspeed, High, Full and Low speeds
  • Host, Device and Hub modeling
  • Top-level USB subenv (agent) with protocol layer, link layer and physical layer random transaction generators
    Protocol Layer
    • Bulk, Control, Interrupt and ISOC transfers
    • Data Bursting
    • SS Bulk Stream
    • LMP, SOF and ITP Generation
    • USB 2.0 Split transfers/transaction
    Link Layer
    • LTSSM with full control to start in any state
    • SS/ESS Power Management
    • Cable attach and detach
    • Cable attach and detach
    • 2.0 LPM, suspend and resume
    • Speed Fall-back and Fall-forward
    • Test Mode
    Physical Layer
    • ESS PIPE4, ESS Serial, SS PIPE3, SS Serial with clock recovery
    • USB 2.0 Serial and HSIC with clock recovery
    • Supports verification of Type-C interface

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