Serial I/O Verification IP 

 
Overview
The Synopsys Serial I/O (SIO) verification IP contains a serial full-duplex Transceiver and a Monitor that conform to RS-232 standards with the following capabilities:
  • Configurable for any RS-232 protocol interface in the design. Configuration parameters can set the format of serial data transfers, the number of data and stop bits in a transfer, and parity bit combinations
  • Executes commands concurrently in true full duplex mode. Full duplex operation utilizes two separate command channels for processing serial transactions
  • Contains five general-purpose input and output signals, which can be controlled with read and write commands
  • Monitors all states and transitions. When an illegal state or transition occurs, the Monitor issues an appropriate message and generates a log of transactions identified on the bus
  • Supports reactive and selfchecking testbenches through the use of watchpoints, which programmatically notify the testbench of events, messages, data/state transitions, interrupts, and errors

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Primary Features
  • Supports both SIO and GPIO
  • Supports IrDA (1.0 SIR)
  • Full duplex operation
  • Data width of 5, 6, 7, or 8 characters
  • Stop bits of 1, 1.5, or 2
  • Parity can be set as even, odd, mark, space, or none
  • Error Injection
  • Auto-CTS/auto-RTS HW flow control
  • FIFO depth can be set from 1 to 2048 bytes
  • Implements four levels of testbench and protocol reset
  • Includes protocol-based scenario generation
  • Supports Verilog and VHDL techbenches
  • Supports all major simulators



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