VC Verification IP for SDIO  


Synopsys VC Verification IP (VIP) for SDIO is a comprehensive VIP solution enabling pre-silicon functional verification of SD (Secure Digital) IO/Memory/Combo designs.

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VC SDIO Verification IP

SDIO Protocol Features
  • Supports SDIO Bus specification Version 2.0 and 3.0
  • Supports SD 1-bit,SD 4-bit and SPI transfrer modes at full clock range of 0-208MHZ
  • Supports all types of SDIO devices (HOST and CARD)
  • Supports all modes of the ultra-high speed 1 (UHS1)
  • Includes wide variety of error injection
  • On–the–fly protocol checking
  • Generates and drives bus traffic as a SDIO Host
  • Responds to transactions as a SDIO Card
  • Up to 7 functions in all modes
  • Support for multiple instantiations
  • Highly parameterized: Verification environment and logical parameters

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