USB 3.0 Verification IP 


The Discovery™ Verification IP (VIP) for USB 3.0 is a multi-layered VIP for the verification of USB Hosts, Devices and Hubs with support for SuperSpeed, High Speed, Full Speed and Low Speed modes. It includes many new features to accelerate testbench development, simplify debug, improve performance and achieve coverage closure. Discovery VIP for USB 3.0 is integrated with the Discovery VIP Protocol Analyzer, a protocol-centric debug environment that gives users an easy to understand, graphical view of complex and highly interleaved traffic. Discovery VIP for USB 3.0 is written entirely in SystemVerilog to run natively in the simulator for optimum performance. Testbench development is accelerated with the assistance of built-in verification plans, example tests and a scenario library. Built-in coverage points integrate with the verification plans showing progress towards achieving coverage goal.

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Discovery VIP for USB 3.0

Primary Features
  • Supports USB 3.0, 2.0 and On-The-Go 3.0 and 2.0 standards
  • Host, Device and Hub emulation
  • Protocol Layer
    • Bulk, Control, Interrupt and ISOC
    • Data Bursting
    • SS Bulk Stream
    • LMP, SOF and ITP Generation
    • USB 2.0 Split
  • Link Layer
    • LTSSM with full control to start in any state
    • SS Power Management
    • Cable attach and detach
    • 2.0 LPM, suspend and resume
    • Speed Fall-back and Fall-forward
    • Test Mode
  • Physical Layer
    • SS PIPE3, SS Serial with clock recovery
    • USB 2.0 Serial and HSIC with clock recovery
  • Methodology Support
    • UVM, VMM, OVM and Verilog testbenches
    • Extensive callbacks, messaging, error injection and functional coverage
  • Includes coverage plan and configuration tool
    • Passive Monitor with checkers and coverage
  • Supports all major simulators

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