MIPI CSI-2 Verification IP 


Synopsys Discovery™ Verification IP (VIP) for MIPI Camera Serial Interface 2 (CSI-2) helps the verification of CSI TX and RX devices with support for High Speed (HS) and Ultra Low Power State (ULPS) modes It supports data-type interleaving frames, normal frames and Virtual Channel ID interleaving frames. It simplifies testbench development by enabling engineers to use a single VIP to verify multiple transmission modes across the full CSI-2 protocol. Discovery VIP for MIPI CSI-2 is integrated with the Discovery VIP Protocol Analyzer, a protocolcentric debug environment that gives users an easy to understand, graphical view of complex and highly interleaved traffic. Discovery VIP for MIPI CSI-2 is written entirely in SystemVerilog to run natively in the simulator for optimum performance. Testbench development is accelerated with the assistance of built-in verification plans, example tests and a scenario library. Built-in coverage points integrate with the verification plans showing progress towards achieving coverage goal.

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Discovery VIP for MIPI CSI-2

Primary Features
  • Supports CSI 2.0 standard with specification revision 1.00.00
  • Compliant with D-PHY specification revision 1.00.00
  • Protocol Layer
    • CSI-2 Transmitter, CSI-2 Receiver
    • Four virtual channels
    • All types of short packets and long packets
    • Interleaved and normal frames
    • Inoperative as well as operative mode of frame number and line number
    • Unidirectional data transfer
    • ECC generation, Checksum (CRC) generation and checking
    • Error detection and recording
  • Physical Layer
    • D-PHY Serial and PHY Protocol Interface (PPI)
    • One to four PHY data lanes and one clock lane
    • High Speed and Escape Mode Transmission
    • Global operational timing parameters
  • Methodology Support
    • VMM, UVM and Verilog testbenches
    • Extensive callbacks, messaging, error injection and functional coverage
  • Includes verification plan
  • Supports all major simulators

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