VCS DAC09 Lunch

Solutions for Tough Verification Challenges

On July 28, 2009, Synopsys hosted a special VCS Verification Luncheon event at DAC in San Francisco, CA focused on the VCS functional verification solution. Verification R&D experts from leading companies discussed how they leverage VCS’s multicore performance, transaction-based verification, tight mixed-signal integration, comprehensive low power verification capabilities and proven methodologies to solve today’s toughest verification challenges.

VCS Verification Luncheon
Speakers:
John Chilton, Session Chair
Sr. VP of Marketing & Corporate Development, Synopsys

YC Wong
Director of IC Engineering, Broadcom
Tough Verification Challenges In Consumer IC Market

Shrenik Mehta
Sr. Director, Frontend Tools and OpenSPARC, Sun Microsystems
Verification of Chip Multi Threading Processors Using VCS

Faisal Haque
Director of Engineering, Qualcomm
Simple Verification Methodology Based on VMM

Amit Chowdhry
Member of Technical Staff, AMD
Array, Mixed-signal IP Verification Overview

DAC 2009: VCS Verification Videolog