This Sentaurus TCAD project provides a template for the simulation of the read/ write operation and the charge retention of a silicon-oxide-nitride-oxide-silicon (SONOS) nonvolatile memory device.
A SONOS memory device is based on a typical 0.13 µm NMOS structure with a nitride layer embedded in the gate stack. The program and erase states of the device are simulated for several cycles to achieve a stead-state charge density and then IdVgs curves are run to extract the corresponding threshold voltages. Lastly, a 10-year simulation is used to characterize the long-term charge retention capabilities of the SONOS structure.
Trapped electron and hole charge and total space charge in nitride region of SONOS device as a function of time during the program and erase cycles; corresponding applied gate bias is also shown
Concentration of electrons during the program cycle (left) and holes during the erase cycle (right) that tunnel into and out of the nitride region of the SONOS device
IdVg curve for program and erase states of SONOS device
Trapped electron and hole charge densities as a function of time are simulated for 10 years
The simulation project is part of the Sentaurus TCAD distribution at:
If you are interested in accessing this Application Example, please fill out the Example Request Form and you will be emailed download instructions.