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CoMET and METeor Models 
Broad portfolio of high speed cycle-accurate transaction-level models  

Synopsys and its partners deliver on the long-standing promise of concurrent hardware and software design and the numerous benefits that result.

Cycle-Accurate Models
Working with its partners Synopsys has developed a growing catalog of virtual processor models (VPM), to work in CoMET/METeor Below is a partial list of key Virtual Processor Models available from Synopsys. For additional models, please contact Synopsys.

 IP Supplier Device Availability
ARM ARM7TDMIAvailable
ARM926Available
ARM946Available
ARM968Available
ARM1136Available
ARM1156Available
ARM1176Available
MPCoreAvailable
CEVATeakliteAvailable
Freescalee200z6Available
eTPUAvailable
e200z3Available
IntelXScaleAvailable
 IP Supplier Device Availability
NECNECV850Available
NECV850ESAvailable
NECV850E1Available
RenesasSH2AAvailable
R32CAvailable
H8SXAvailable
StarCoreSC1400Available
SC1200Available
SC3400Available
SC2400Available
ToshibaTX99Available
TX19AAvailable
TX49H3Available

VPMs are key elements to build virtual prototypes, high-speed, cycle-accurate software model of a system on chip (SOC) that enables architecture analysis and optimization plus full software development well in advance of actual first silicon.

Together with Synopsys, semiconductor suppliers model the complete SoC including processor cores, peripheral devices, buses and bus interface units. This virtual prototype is then available to the embedded software developer for development of the target software. Synopsys and the semiconductor supplier work together to provide tools flow integration and technical support to the end customer.

Synopsys provides a library of generic components for CoMET and METeor, such as memories, timers, and interrupt controllers that can be configured to match custom requirements. Using the Peripheral Device Builder (PDB) customers can accelerate the creation of new peripheral devices. In addition, customer authored models written in C, C++, or SystemC are easily incorporated and simulated. This includes all models from the DesignWare System-Level Library.

In addition to Synopsys creating virtual models of processors, customers can now use VPM Transformer (VPM-T), a toolset and methodology for modification of the instruction set and timing of a Synopsys Seed VPM. The Synopsys Seed VPM models the instruction set, micro-architecture, pipelining and other behavior of a specific microprocessor. Users then generate a new VPM in the same microprocessor family by adding, removing or replacing instructions in the Synopsys Seed VPM instruction set. The behavior, timing and mnemonic aspects of an instruction can be changed independently.



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