Articles 


Physically-Aware ECO for Faster Timing Closure
Synopsys, explains how recent physically-aware updates to the Synopsys Galaxy timing ECO tool suite are helping design teams to accelerate one of the most critical and time-consuming parts of the design flow: managing engineering change orders (ECOs) for timing closure.
Apr 15, 2014

Achieving multi-scenario signoff quickly and predictably using timing-driven ECO
Using a physically aware flow to ensure that fixing one ECO doesn’t introduce another during sign off.
Mar 27, 2014

Experts At The Table: The Growing Signoff Headache
Low-Power/High-Performance Engineering sat down to discuss signoff issues with Robert Hoogenstryd, senior director of marketing for signoff at Synopsys, and more.
May 09, 2013

20nm timing analysis – a practical and scalable approach
Using hierarchy and improved constraints management to accelerate static timing analysis at 20nm and below.
Dec 06, 2012

Reducing Turnaround Time with Hierarchical Timing Analysis
PrimeTime HyperScale technology addresses the existing challenges of STA on hierarchical designs and enables seamless hierarchical STA signoff on multi-million instance SoCs like those used in today's smart phones.
Oct 03, 2011

Synopsys introduced PrimeTime’s next generation ECO technology
The new technology targeted at the overall optimal ECO guidance, considers all the possible violations. This technology also reduces the runtime. Ikutaro Kojima, Tech-On!, Nikkei BP (The article is written in Japanese)
Jan 29, 2011

Static Timing Analyzer Goes Multicore And Distributed
Synopsys continues to follow through on its multicore initiative, which the company announced in March 2008.
Jan 27, 2010

PrimeTime 2009.12 Delivers New Threaded Multicore Performance
Synopsys, Inc. announced the immediate availability of PrimeTime 2009.12, which it claims delivers up to 2X speed up of timing signoff through the addition of threaded multicore processing.
Jan 11, 2010

Synopsys offers StarRC Custom extraction tool
Synopsys, Inc. has extended its Galaxy implementation platform with the StarRC Custom parasitic extraction solution for analog mixed-signal and custom digital IC design.
Sep 21, 2009




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