Physical Verification System 

Comprehensive Physical Verification for Accelerating Innovation  

Physical Verification in the Synopsys Galaxy™ Design Platform provides technology-leading, production-proven solutions for design rule checking (DRC), layout verification (LVS), and practical DFM applications such as lithography compliance checking (LCC). The Physical Verification solution offers production-proven and foundry-certified signoff through 32 nanometers coupled with productivity links to leading design tools such as IC Compiler and IC Compiler II physical design, StarRC parasitic extraction and Custom Designer mixed-signal design. The latest signoff DRC/LVS offering, IC Validator, is architected for in-design Physical Verification within IC Compiler and IC Compiler II.

  • Tools
 

 
Production-proven physical verification tool for 45nm and below
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  • Hercules
  • Technology-leading physical verification solution for 45nm and abovemore

 
Hercules PVS is the fastest physical verification solution on the market.


 
PrimeYield is a comprehensive tool suite for design-yield analysis.