IC Compiler II 

Hear what Designers are saying about IC Compiler II

 

Antun Domic Discusses IC Compiler II

Hear what Antun Domic, executive vice president and general manager of Synopsys' Design Group, has to say about the IC Compiler II physical implementation solution.

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IC Compiler II at DAC 2016

IC Compiler II at DAC 2016

Highlights of DAC 2016 IC Compiler II luncheon with presentations from
Socionext, Qualcomm, Toshiba, and Infineon









IC Compiler II Lunch and Learn

Achieving Industry-Best QoR on Advanced Designs

Highlights of Silicon Valley SNUG 2016 IC Compiler II luncheon with presentations from NVIDIA, HiSilicon, Socionext, and Qualcomm
HiSilicon, NVIDIA, Qualcomm, Socionext









IC Compiler II at DAC 2015

Highlights of DAC 2015 IC Compiler II luncheon with presentations from
AMD, ARM, MediaTek, Samsung, and Socionext



IC Compiler II at Silicon Valley SNUG

Highlights of Silicon Valley SNUG 2015 IC Compiler II luncheon with presentations from
ARM, Mediatek, Toshiba, and Renesas



R&D Insights

IC Compiler II Core Infrastructure
Mark Bales, Synopsys Scientist, explains the new IC Compiler II infrastructure and how it enables 10X faster throughput.

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IC Compiler II Optimization
Thomas Andersen, Group Director R&D, provides an overview of physical optimization in IC Compiler II and how the new global-analytics- based framework enables high QoR along with fast, hierarchical full chip closure.

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IC Compiler II Clock Synthesis
Aiqun Cao, Principal Engineer, discusses how IC Compiler II’s new clock synthesis delivers faster design convergence with automated variation-tolerance.

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IC Compiler II Design Planning
Neeraj Kaul, Group Director R&D, discusses hierarchical design planning in IC Compiler II and how the new data and tool architectures enable unprecedented design capacity and throughput.

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