Verification 

Delivering a New Level of Verification Excellence to Accelerate Innovation 

The Discovery Verification Platform is an integrated portfolio of functional, AMS, debug, static, formal, low-power and hardware-assisted verification tools. Discovery provides high performance, high accuracy and efficient interactions among best-in-class technologies including mixed-HDL simulation, mixed-signal simulation, assertions, coverage, testbench automation, verification IP, static and formal analysis, unified debug, equivalence checking, acceleration, emulation and rapid prototyping. Discovery’s components support industry standards including SystemVerilog, SystemC, VHDL, UPF, OpenVera, Verilog-A, Verilog-AMS, SPICE, and more.

  • Tools
 

Verification Compiler
Comprehensive, best-in-class verification in one product
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VCS
High-performance simulation


VCS AMS
Mixed-signal verification solution


VCS Xprop
X-propagation support for X-related simulation and debug


Verification IP
Broad portfolio of Verification IP


VC Formal
Next-generation formal verification solution
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VC CDC
Next-generation CDC static checking solution
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VC LP
Advanced Low Power static checking solution
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VCS NLP with MVSIM
Voltage-aware native low power simulation
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VC Formal Coverage Analyzer
Integrated formal analysis for coverage closure



Certitude
Functional qualification system
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ZeBu Emulation
Billion-gate ASIC and SoC acceleration and emulation


Leda
Static checker


Magellan
Formal hybrid verification


Pioneer-NTB with Vera
Testbench automation


HECTOR
Next-generation formal block-level consistency checker

  • Debug
  • Open debug solutions for design and verificationmore

Verdi
Automated debug system
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Verdi HW SW Debug
Hardware/software debug
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Siloti
Visibility automation system
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ProtoLink
Probe visualizer
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VC Formal
Next-generation formal verification solution
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VC CDC
Next-generation static CDC checker solution
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VC LP
Advanced static low power rule checker solution
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HECTOR
Next-generation formal block-level consistency checker


Formal Equivalence Checking
Comprehensive equivalence checking solution


VC Formal Coverage Analyzer
Integrated formal analysis for coverage closure



VCS AMS
Mixed-signal verification solution


Circuit Simulation
Performance, accuracy and capacity for AMS verification


Reliability & Circuit Checks
Transistor-level reliability analysis and electrical violation checking


Waveform Analysis & Debug
Avoid wasted simulation time. Better mixed-signal chips... faster!


Custom Extraction
Unified gold-standard extraction to accelerate custom IC design


VC LP
Advanced low power static rules checker solution
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VCS NLP with MVSIM
Voltage-aware native low power simulation
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HSIM
Hierarchical, full-chip circuit simulation and analysis


HSPICE
Gold standard for accurate circuit simulation
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Emulation
HW-based simulation engines for SoC Verification


FPGA-Based Prototyping
A comprehensive at-speed system validation platform that dramatically accelerates HW/SW co-design and embedded SW development



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