ZeBu Debug 

 

Synopsys ZeBu fast emulators come equipped with a comprehensive suite of debugging features, which, when paired with a "Smart" Debug Methodology, enable you to quickly find and correct bugs in your ASIC design.

  • Multi-MHz Performance
    • ZeBu’s higher speed of emulation hits deep-cycle bugs sooner, and reproduces error conditions faster than traditional emulators
  • Transaction-based Debugging
  • Assertion-based Debugging
    • Support for synthesizable SystemVerilog Assertions with zFast
  • Cycle/Signal-based Debugging
    • Static Probes offer full speed access to critical signals for hardware logic analyzer triggers, and waveform generation via trace memory
    • Flexible Probes offer high speed access to interface signals and important functional blocks for waveform generation, and software based logic analysis
    • Dynamic Probes offer complete design access and waveform generation of all sequential and non-sequential elements, without any additional logic or design re-compilation
    • Waveform generation in fsdb, VCD and VPD format
    • Fast memory preload, view/change memory contents at run-time
    • Design state Save & Restore

See Also

Product: ZEMI-3

Solution: Smart Debug Methodology

Solutions: Transaction-Based Verification

ZeBu Debug



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