Articles 


VCS Enables Efficient Constraint Solving and Debugging of SoC Design
This article explains the considerations for a functional verification approach to debugging complex SoCs.

Attacking Constraint Complexity- Verification Reuse
This two-part article series looks at a scalable constraint methodology and provides an overview of some of the key constraint optimization challenges and strategies of concern to verification engineers. Part 1 of this article series focuses on verification IP reuse—detailing how a solver typically interprets constraints and providing a case study focused on a constraint-driven performance optimization strategy with respect to the flexible packet parser of a hypothetical networking ASIC.

Attacking Constraint Complexity- E Soft and SystemVerilog Default Constraints
This two-part article series looks at a scalable constraint methodology and provides an overview of some of the key constraint optimization challenges and strategies of concern to verification engineers. Part 2 of this article series focuses on explores the similarities and differences, including subtle semantic differences, between E Soft Constraints and OpenVera Default constraints in the interest of optimizing constraint performance and speeding validation.

Synopsys Introduces Discovery 2009
Platform Encompasses New Multicore Simulation Performance, Native Design Checks, Comprehensive Low Power Verification Capabilities, and CustomSim Unified Circuit Simulation Solution.