|Eliminate DDR3 Timing Errors with HSPICE and Zuken Constraint-based PCB Routing|
Learn how to analyze signal integrity of critical traces in your PC board layout, incorporate board parasitics and define design constraints to eliminate timing violations.
Griff Derryberry, Applications Engineer, Zuken USA; Hany Elhak, Product Marketing Manager, Synopsys
Dec 11, 2013
|Micron Case Study: Electrical Modeling of 3D-IC Through-Silicon Vias Using HSPICE|
Learn how to effectively model the impact of TSVs on signal and power delivery, especially for high-speed applications.
Fuad Badrieh, Ph.D., Principal Engineer, Micron Technology; Hany Elhak, Product Marketing Manager, Synopsys
Jul 10, 2013
|Discovery-AMS for Mixed-Signal Verification - An ST-Ericsson Case Study|
ST-Ericsson shares details on how they leveraged new Discovery-AMS multi-core technology to improve their overall verification flow.
Francois Ravatin, AMS Verification Engineer, ST-Ericsson; Helene Thibieroz, Sr. Product Marketing Manager, Synopsys
May 21, 2013
|Open Your Eye with HSPICE Fast and Accurate Eye Diagram Analysis|
Learn how HSPICE can help you quickly model high-frequency channel components, run fast transient with long cable S-parameter models, and accurately analyze eye measurement.
Ted Mido, Sr. Staff R&D Enigeer, Synopsys
Oct 17, 2012
|Eliminate the Digital Implementation Bottleneck with Fast and Accurate Library Characterization|
Learn how SiliconSmart can help you produce accurate model libraries that are tightly correlated with Synopsys' digital implementation tools and PrimeTime
Eduardo Flores, Staff Applications Consultant, Synopsys; Surbhi Agarwal, Product Marketing Manager, Synopsys
Oct 16, 2012
|High-Productivity Analog Verification and Debug with CustomSim and CustomExplorer Ultra|
See how Synopsys' advanced analog verification solution can dramatically increase your verification productivity with CustomExplorer Ultra, along with CustomSim and CustomSim-VCS.
Duncan McDonald, Product Marketing Manager, Synopsys
Jul 11, 2012
|Understand and Avoid Electromigration (EM) & IR-drop Effects in Custom IP Blocks|
Learn how process technology & changing design styles increase the impact of EM & IR-drop effects on the performance/reliability of AMS, memory & custom digital IP blocks at 28nm and below.
Bradley Geden, Solution Architect, Synopsys
Oct 26, 2011